* [PATCH] x86/split_lock: Enumerate split lock feature on Sapphire Rapids and Alder Lake
@ 2020-07-24 23:45 Fenghua Yu
2020-07-25 12:14 ` [tip: x86/cpu] x86/split_lock: Enable the split lock feature on Sapphire Rapids and Alder Lake CPUs tip-bot2 for Fenghua Yu
0 siblings, 1 reply; 2+ messages in thread
From: Fenghua Yu @ 2020-07-24 23:45 UTC (permalink / raw)
To: Thomas Gleixner, Borislav Petkov, Ingo Molnar, Peter Zijlstra,
Tony Luck, H Peter Anvin, Andy Lutomirski, Ravi V Shankar,
Xiaoyao Li
Cc: x86, linux-kernel, Fenghua Yu
Add Sapphire Rapids and Alder Lake processors to CPU list to enumerate
split lock feature.
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
---
This patch supersedes
https://lore.kernel.org/lkml/1593208534-33721-1-git-send-email-fenghua.yu@intel.com/
and is applied on top of Alder Lake Intel family patch:
https://lore.kernel.org/lkml/20200721043749.31567-1-tony.luck@intel.com/#iZ30arch:x86:include:asm:intel-family.h
arch/x86/kernel/cpu/intel.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 0ab48f1cdf84..b6b7b38dff5f 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -1156,6 +1156,8 @@ static const struct x86_cpu_id split_lock_cpu_ids[] __initconst = {
X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, 1),
X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, 1),
X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, 1),
+ X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, 1),
+ X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, 1),
{}
};
--
2.19.1
^ permalink raw reply [flat|nested] 2+ messages in thread* [tip: x86/cpu] x86/split_lock: Enable the split lock feature on Sapphire Rapids and Alder Lake CPUs
2020-07-24 23:45 [PATCH] x86/split_lock: Enumerate split lock feature on Sapphire Rapids and Alder Lake Fenghua Yu
@ 2020-07-25 12:14 ` tip-bot2 for Fenghua Yu
0 siblings, 0 replies; 2+ messages in thread
From: tip-bot2 for Fenghua Yu @ 2020-07-25 12:14 UTC (permalink / raw)
To: linux-tip-commits; +Cc: Fenghua Yu, Ingo Molnar, Tony Luck, x86, LKML
The following commit has been merged into the x86/cpu branch of tip:
Commit-ID: 3aae57f0c3ba57715cf89201b5a5f290684078a5
Gitweb: https://git.kernel.org/tip/3aae57f0c3ba57715cf89201b5a5f290684078a5
Author: Fenghua Yu <fenghua.yu@intel.com>
AuthorDate: Fri, 24 Jul 2020 16:45:20 -07:00
Committer: Ingo Molnar <mingo@kernel.org>
CommitterDate: Sat, 25 Jul 2020 12:17:00 +02:00
x86/split_lock: Enable the split lock feature on Sapphire Rapids and Alder Lake CPUs
Add Sapphire Rapids and Alder Lake processors to CPU list to enumerate
and enable the split lock feature.
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/r/1595634320-79689-1-git-send-email-fenghua.yu@intel.com
---
arch/x86/kernel/cpu/intel.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 0ab48f1..b6b7b38 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -1156,6 +1156,8 @@ static const struct x86_cpu_id split_lock_cpu_ids[] __initconst = {
X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, 1),
X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, 1),
X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, 1),
+ X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, 1),
+ X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, 1),
{}
};
^ permalink raw reply [flat|nested] 2+ messages in thread
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2020-07-24 23:45 [PATCH] x86/split_lock: Enumerate split lock feature on Sapphire Rapids and Alder Lake Fenghua Yu
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