[PATCH v3 0/3] drm/bridge: nwl-dsi: Get MIPI DSI controller and PHY ready in ->mode_set()

[Liu Ying <victor.liu@nxp.com>]

Hi,

This series aims to make the nwl-dsi bridge be able to connect with
more MIPI DSI panels.  Some MIPI DSI panel drivers like 'raydium,rm68200'
send MIPI_DCS_SET_DISPLAY_ON commands in panel_funcs->prepare(), which
requires the MIPI DSI controller and PHY to be ready beforehand.
However, the existing nwl-dsi driver gets the MIPI DSI controller and
PHY ready in bridge_funcs->pre_enable(), which happens after the
panel_funcs->prepare().  So, this series shifts the bridge operation
ealier from bridge_funcs->pre_enable() to bridge_funcs->mode_set().

Patch 3/3 does the essential bridge operation shift.

Patch 1/3 and 2/3 are split from the original single patch in v2 and
are needed by patch 3/3.  This split-up helps clarify changes better.
The split-up is done in this way:

1) Patch 1/3 forces a full modeset when crtc_state->active is changed to
   be true(which implies only connector's DPMS is brought out of "Off"
   status, though not necessarily).  This makes sure ->mode_set() and
   ->atomic_disable() will be called in pairs.
2) Patch 2/3 removes a check on unchanged HS clock rate from ->mode_set(),
   to make sure MIPI DSI controller and PHY are brought up and taken down
   in pairs.
3) Patch 3/3 shifts the bridge operation as the last step.


v2->v3:
* Split the single patch in v2 into 3 patches. (Neil)

v1->v2:
* Fix a typo in commit message - s/unchange/unchanged/


Liu Ying (3):
  drm/bridge: nwl-dsi: Force a full modeset when crtc_state->active is
    changed to be true
  drm/bridge: nwl-dsi: Remove a check on unchanged HS clock rate from
    ->mode_set()
  drm/bridge: nwl-dsi: Get MIPI DSI controller and PHY ready in
    ->mode_set()

 drivers/gpu/drm/bridge/nwl-dsi.c | 86 +++++++++++++++++---------------
 1 file changed, 46 insertions(+), 40 deletions(-)

-- 
2.25.1