From: Neil Armstrong <narmstrong@baylibre.com>
To: Liu Ying <victor.liu@nxp.com>, dri-devel@lists.freedesktop.org
Cc: linux-kernel@vger.kernel.org, a.hajda@samsung.com,
robert.foss@linaro.org, Laurent.pinchart@ideasonboard.com,
jonas@kwiboo.se, jernej.skrabec@siol.net, airlied@linux.ie,
daniel@ffwll.ch, agx@sigxcpu.org, robert.chiras@nxp.com,
linux-imx@nxp.com
Subject: Re: [PATCH v3 3/3] drm/bridge: nwl-dsi: Get MIPI DSI controller and PHY ready in ->mode_set()
Date: Fri, 30 Apr 2021 10:35:16 +0200 [thread overview]
Message-ID: <be50d7db-3455-2357-8601-501bc4b5aeb4@baylibre.com> (raw)
In-Reply-To: <1619170003-4817-4-git-send-email-victor.liu@nxp.com>
On 23/04/2021 11:26, Liu Ying wrote:
> Some MIPI DSI panel drivers like 'raydium,rm68200' send
> MIPI_DCS_SET_DISPLAY_ON commands in panel_funcs->prepare(), which
> requires the MIPI DSI controller and PHY to be ready beforehand.
> Without this patch, the nwl-dsi driver gets the MIPI DSI controller
> and PHY ready in bridge_funcs->atomic_pre_enable(), which happens after
> the panel_funcs->prepare(). So, this patch shifts the bridge operation
> ealier from bridge_funcs->atomic_pre_enable() to bridge_funcs->mode_set().
> This way, more MIPI DSI panels can connect to this nwl-dsi bridge.
>
> Cc: Andrzej Hajda <a.hajda@samsung.com>
> Cc: Neil Armstrong <narmstrong@baylibre.com>
> Cc: Robert Foss <robert.foss@linaro.org>
> Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
> Cc: Jonas Karlman <jonas@kwiboo.se>
> Cc: Jernej Skrabec <jernej.skrabec@siol.net>
> Cc: David Airlie <airlied@linux.ie>
> Cc: Daniel Vetter <daniel@ffwll.ch>
> Cc: Guido Günther <agx@sigxcpu.org>
> Cc: Robert Chiras <robert.chiras@nxp.com>
> Cc: NXP Linux Team <linux-imx@nxp.com>
> Signed-off-by: Liu Ying <victor.liu@nxp.com>
> ---
> v2->v3:
> * Split some changes to patch 1/3 and 2/3, to clarify changes. (Neil)
>
> v1->v2:
> * Fix a typo in commit message - s/unchange/unchanged/
>
> drivers/gpu/drm/bridge/nwl-dsi.c | 28 ++++++++++++----------------
> 1 file changed, 12 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/nwl-dsi.c b/drivers/gpu/drm/bridge/nwl-dsi.c
> index 601ccc4a7cdc7..873995f0a7416 100644
> --- a/drivers/gpu/drm/bridge/nwl-dsi.c
> +++ b/drivers/gpu/drm/bridge/nwl-dsi.c
> @@ -662,7 +662,7 @@ static irqreturn_t nwl_dsi_irq_handler(int irq, void *data)
> return IRQ_HANDLED;
> }
>
> -static int nwl_dsi_enable(struct nwl_dsi *dsi)
> +static int nwl_dsi_mode_set(struct nwl_dsi *dsi)
> {
> struct device *dev = dsi->dev;
> union phy_configure_opts *phy_cfg = &dsi->phy_cfg;
> @@ -834,7 +834,12 @@ static int nwl_dsi_bridge_atomic_check(struct drm_bridge *bridge,
> adjusted_mode->flags |= (DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
> adjusted_mode->flags &= ~(DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC);
>
> - /* Do a full modeset if crtc_state->active is changed to be true. */
> + /*
> + * Do a full modeset if crtc_state->active is changed to be true.
> + * This ensures our ->mode_set() is called to get the DSI controller
> + * and the PHY ready to send DCS commands, when only the connector's
> + * DPMS is brought out of "Off" status.
> + */
> if (crtc_state->active_changed && crtc_state->active)
> crtc_state->mode_changed = true;
>
> @@ -863,16 +868,8 @@ nwl_dsi_bridge_mode_set(struct drm_bridge *bridge,
>
> memcpy(&dsi->mode, adjusted_mode, sizeof(dsi->mode));
> drm_mode_debug_printmodeline(adjusted_mode);
> -}
> -
> -static void
> -nwl_dsi_bridge_atomic_pre_enable(struct drm_bridge *bridge,
> - struct drm_bridge_state *old_bridge_state)
> -{
> - struct nwl_dsi *dsi = bridge_to_dsi(bridge);
> - int ret;
>
> - pm_runtime_get_sync(dsi->dev);
> + pm_runtime_get_sync(dev);
>
> if (clk_prepare_enable(dsi->lcdif_clk) < 0)
> return;
> @@ -882,22 +879,22 @@ nwl_dsi_bridge_atomic_pre_enable(struct drm_bridge *bridge,
> /* Step 1 from DSI reset-out instructions */
> ret = reset_control_deassert(dsi->rst_pclk);
> if (ret < 0) {
> - DRM_DEV_ERROR(dsi->dev, "Failed to deassert PCLK: %d\n", ret);
> + DRM_DEV_ERROR(dev, "Failed to deassert PCLK: %d\n", ret);
> return;
> }
>
> /* Step 2 from DSI reset-out instructions */
> - nwl_dsi_enable(dsi);
> + nwl_dsi_mode_set(dsi);
>
> /* Step 3 from DSI reset-out instructions */
> ret = reset_control_deassert(dsi->rst_esc);
> if (ret < 0) {
> - DRM_DEV_ERROR(dsi->dev, "Failed to deassert ESC: %d\n", ret);
> + DRM_DEV_ERROR(dev, "Failed to deassert ESC: %d\n", ret);
> return;
> }
> ret = reset_control_deassert(dsi->rst_byte);
> if (ret < 0) {
> - DRM_DEV_ERROR(dsi->dev, "Failed to deassert BYTE: %d\n", ret);
> + DRM_DEV_ERROR(dev, "Failed to deassert BYTE: %d\n", ret);
> return;
> }
> }
> @@ -953,7 +950,6 @@ static const struct drm_bridge_funcs nwl_dsi_bridge_funcs = {
> .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
> .atomic_reset = drm_atomic_helper_bridge_reset,
> .atomic_check = nwl_dsi_bridge_atomic_check,
> - .atomic_pre_enable = nwl_dsi_bridge_atomic_pre_enable,
> .atomic_enable = nwl_dsi_bridge_atomic_enable,
> .atomic_disable = nwl_dsi_bridge_atomic_disable,
> .mode_set = nwl_dsi_bridge_mode_set,
>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
next prev parent reply other threads:[~2021-04-30 8:35 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-23 9:26 [PATCH v3 0/3] " Liu Ying
2021-04-23 9:26 ` [PATCH v3 1/3] drm/bridge: nwl-dsi: Force a full modeset when crtc_state->active is changed to be true Liu Ying
2021-04-30 8:35 ` Neil Armstrong
[not found] ` <CAG3jFytcPzo81t8hubAf4Gb1zrVzZVB5D6qP-Dnchef6Zus25Q@mail.gmail.com>
2021-04-30 11:45 ` Liu Ying
2021-04-23 9:26 ` [PATCH v3 2/3] drm/bridge: nwl-dsi: Remove a check on unchanged HS clock rate from ->mode_set() Liu Ying
2021-04-30 8:35 ` Neil Armstrong
2021-04-23 9:26 ` [PATCH v3 3/3] drm/bridge: nwl-dsi: Get MIPI DSI controller and PHY ready in ->mode_set() Liu Ying
2021-04-30 8:35 ` Neil Armstrong [this message]
2021-04-30 8:35 ` [PATCH v3 0/3] " Neil Armstrong
2021-04-30 9:17 ` Guido Günther
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