From: "tip-bot2 for Adrian Hunter" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Adrian Hunter <adrian.hunter@intel.com>,
Borislav Petkov <bp@suse.de>,
Arnaldo Carvalho de Melo <acme@redhat.com>,
Masami Hiramatsu <mhiramat@kernel.org>,
x86@kernel.org, linux-kernel@vger.kernel.org
Subject: [tip: x86/misc] x86/insn: Add misc instructions to x86 instruction decoder
Date: Sun, 23 Jan 2022 19:44:55 -0000 [thread overview]
Message-ID: <164296709502.16921.15205293293969486611.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20211202095029.2165714-5-adrian.hunter@intel.com>
The following commit has been merged into the x86/misc branch of tip:
Commit-ID: 0153d98f2dd6d5161fc4d496d785c10686d0d7b6
Gitweb: https://git.kernel.org/tip/0153d98f2dd6d5161fc4d496d785c10686d0d7b6
Author: Adrian Hunter <adrian.hunter@intel.com>
AuthorDate: Thu, 02 Dec 2021 11:50:27 +02:00
Committer: Borislav Petkov <bp@suse.de>
CommitterDate: Sun, 23 Jan 2022 20:37:54 +01:00
x86/insn: Add misc instructions to x86 instruction decoder
x86 instruction decoder is used for both kernel instructions and user space
instructions (e.g. uprobes, perf tools Intel PT), so it is good to update
it with new instructions.
Add instructions to x86 instruction decoder:
User Interrupt
clui
senduipi
stui
testui
uiret
Prediction history reset
hreset
Serialize instruction execution
serialize
TSX suspend load address tracking
xresldtrk
xsusldtrk
Reference:
Intel Architecture Instruction Set Extensions and Future Features
Programming Reference
May 2021
Document Number: 319433-044
Example using perf tools' x86 instruction decoder test:
$ perf test -v "x86 instruction decoder" |& grep -i hreset
Decoded ok: f3 0f 3a f0 c0 00 hreset $0x0
Decoded ok: f3 0f 3a f0 c0 00 hreset $0x0
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Masami Hiramatsu <mhiramat@kernel.org>
Link: https://lore.kernel.org/r/20211202095029.2165714-5-adrian.hunter@intel.com
---
arch/x86/lib/x86-opcode-map.txt | 6 +++---
tools/arch/x86/lib/x86-opcode-map.txt | 6 +++---
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/x86/lib/x86-opcode-map.txt b/arch/x86/lib/x86-opcode-map.txt
index b2cc6c0..591797a 100644
--- a/arch/x86/lib/x86-opcode-map.txt
+++ b/arch/x86/lib/x86-opcode-map.txt
@@ -893,7 +893,7 @@ cc: sha1rnds4 Vdq,Wdq,Ib
ce: vgf2p8affineqb Vx,Wx,Ib (66)
cf: vgf2p8affineinvqb Vx,Wx,Ib (66)
df: VAESKEYGEN Vdq,Wdq,Ib (66),(v1)
-f0: RORX Gy,Ey,Ib (F2),(v)
+f0: RORX Gy,Ey,Ib (F2),(v) | HRESET Gv,Ib (F3),(000),(11B)
EndTable
GrpTable: Grp1
@@ -976,7 +976,7 @@ GrpTable: Grp7
2: LGDT Ms | XGETBV (000),(11B) | XSETBV (001),(11B) | VMFUNC (100),(11B) | XEND (101)(11B) | XTEST (110)(11B) | ENCLU (111),(11B)
3: LIDT Ms
4: SMSW Mw/Rv
-5: rdpkru (110),(11B) | wrpkru (111),(11B) | SAVEPREVSSP (F3),(010),(11B) | RSTORSSP Mq (F3) | SETSSBSY (F3),(000),(11B)
+5: rdpkru (110),(11B) | wrpkru (111),(11B) | SAVEPREVSSP (F3),(010),(11B) | RSTORSSP Mq (F3) | SETSSBSY (F3),(000),(11B) | CLUI (F3),(110),(11B) | SERIALIZE (000),(11B) | STUI (F3),(111),(11B) | TESTUI (F3)(101)(11B) | UIRET (F3),(100),(11B) | XRESLDTRK (F2),(000),(11B) | XSUSLDTRK (F2),(001),(11B)
6: LMSW Ew
7: INVLPG Mb | SWAPGS (o64),(000),(11B) | RDTSCP (001),(11B)
EndTable
@@ -993,7 +993,7 @@ GrpTable: Grp9
3: xrstors
4: xsavec
5: xsaves
-6: VMPTRLD Mq | VMCLEAR Mq (66) | VMXON Mq (F3) | RDRAND Rv (11B)
+6: VMPTRLD Mq | VMCLEAR Mq (66) | VMXON Mq (F3) | RDRAND Rv (11B) | SENDUIPI Gq (F3)
7: VMPTRST Mq | VMPTRST Mq (F3) | RDSEED Rv (11B)
EndTable
diff --git a/tools/arch/x86/lib/x86-opcode-map.txt b/tools/arch/x86/lib/x86-opcode-map.txt
index b2cc6c0..591797a 100644
--- a/tools/arch/x86/lib/x86-opcode-map.txt
+++ b/tools/arch/x86/lib/x86-opcode-map.txt
@@ -893,7 +893,7 @@ cc: sha1rnds4 Vdq,Wdq,Ib
ce: vgf2p8affineqb Vx,Wx,Ib (66)
cf: vgf2p8affineinvqb Vx,Wx,Ib (66)
df: VAESKEYGEN Vdq,Wdq,Ib (66),(v1)
-f0: RORX Gy,Ey,Ib (F2),(v)
+f0: RORX Gy,Ey,Ib (F2),(v) | HRESET Gv,Ib (F3),(000),(11B)
EndTable
GrpTable: Grp1
@@ -976,7 +976,7 @@ GrpTable: Grp7
2: LGDT Ms | XGETBV (000),(11B) | XSETBV (001),(11B) | VMFUNC (100),(11B) | XEND (101)(11B) | XTEST (110)(11B) | ENCLU (111),(11B)
3: LIDT Ms
4: SMSW Mw/Rv
-5: rdpkru (110),(11B) | wrpkru (111),(11B) | SAVEPREVSSP (F3),(010),(11B) | RSTORSSP Mq (F3) | SETSSBSY (F3),(000),(11B)
+5: rdpkru (110),(11B) | wrpkru (111),(11B) | SAVEPREVSSP (F3),(010),(11B) | RSTORSSP Mq (F3) | SETSSBSY (F3),(000),(11B) | CLUI (F3),(110),(11B) | SERIALIZE (000),(11B) | STUI (F3),(111),(11B) | TESTUI (F3)(101)(11B) | UIRET (F3),(100),(11B) | XRESLDTRK (F2),(000),(11B) | XSUSLDTRK (F2),(001),(11B)
6: LMSW Ew
7: INVLPG Mb | SWAPGS (o64),(000),(11B) | RDTSCP (001),(11B)
EndTable
@@ -993,7 +993,7 @@ GrpTable: Grp9
3: xrstors
4: xsavec
5: xsaves
-6: VMPTRLD Mq | VMCLEAR Mq (66) | VMXON Mq (F3) | RDRAND Rv (11B)
+6: VMPTRLD Mq | VMCLEAR Mq (66) | VMXON Mq (F3) | RDRAND Rv (11B) | SENDUIPI Gq (F3)
7: VMPTRST Mq | VMPTRST Mq (F3) | RDSEED Rv (11B)
EndTable
next prev parent reply other threads:[~2022-01-23 19:45 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-02 9:50 [PATCH 0/6] x86/insn: Add instructions to " Adrian Hunter
2021-12-02 9:50 ` [PATCH 1/6] perf tests: Add AMX instructions to x86 instruction decoder test Adrian Hunter
2022-01-23 19:44 ` [tip: x86/misc] perf/tests: " tip-bot2 for Adrian Hunter
2021-12-02 9:50 ` [PATCH 2/6] x86/insn: Add AMX instructions to x86 instruction decoder Adrian Hunter
2022-01-23 19:44 ` [tip: x86/misc] x86/insn: Add AMX instructions to the " tip-bot2 for Adrian Hunter
2021-12-02 9:50 ` [PATCH 3/6] perf tests: Add misc instructions to x86 instruction decoder test Adrian Hunter
2022-01-23 19:44 ` [tip: x86/misc] perf/tests: Add misc instructions to the " tip-bot2 for Adrian Hunter
2021-12-02 9:50 ` [PATCH 4/6] x86/insn: Add misc instructions to x86 instruction decoder Adrian Hunter
2022-01-23 19:44 ` tip-bot2 for Adrian Hunter [this message]
2021-12-02 9:50 ` [PATCH 5/6] perf tests: Add AVX512-FP16 instructions to x86 instruction decoder test Adrian Hunter
2022-01-23 19:44 ` [tip: x86/misc] perf/tests: " tip-bot2 for Adrian Hunter
2021-12-02 9:50 ` [PATCH 6/6] x86/insn: Add AVX512-FP16 instructions to x86 instruction decoder Adrian Hunter
2022-01-23 19:44 ` [tip: x86/misc] x86/insn: Add AVX512-FP16 instructions to the " tip-bot2 for Adrian Hunter
2021-12-23 6:38 ` [PATCH 0/6] x86/insn: Add instructions to " Masami Hiramatsu
2022-01-03 8:13 ` Adrian Hunter
2022-01-03 14:56 ` Arnaldo Carvalho de Melo
2022-01-03 15:01 ` Arnaldo Carvalho de Melo
2022-01-03 15:40 ` Adrian Hunter
2022-01-03 18:22 ` Arnaldo Carvalho de Melo
2022-01-03 18:30 ` Arnaldo Carvalho de Melo
2022-01-13 6:52 ` Adrian Hunter
2022-01-13 10:16 ` Borislav Petkov
2022-01-13 10:33 ` Adrian Hunter
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=164296709502.16921.15205293293969486611.tip-bot2@tip-bot2 \
--to=tip-bot2@linutronix.de \
--cc=acme@redhat.com \
--cc=adrian.hunter@intel.com \
--cc=bp@suse.de \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-tip-commits@vger.kernel.org \
--cc=mhiramat@kernel.org \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®