From: "tip-bot2 for Jane Chu" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Jane Chu <jane.chu@oracle.com>, Borislav Petkov <bp@suse.de>,
Dan Williams <dan.j.williams@intel.com>,
Ingo Molnar <mingo@kernel.org>,
x86@kernel.org, linux-kernel@vger.kernel.org
Subject: [tip: ras/core] x86/mce: Retrieve poison range from hardware
Date: Mon, 29 Aug 2022 08:11:09 -0000 [thread overview]
Message-ID: <166176066946.401.17043823201433426666.tip-bot2@tip-bot2> (raw)
In-Reply-To: <7ed50fd8-521e-cade-77b1-738b8bfb8502@oracle.com>
The following commit has been merged into the ras/core branch of tip:
Commit-ID: f9781bb18ed828e7b83b7bac4a4ad7cd497ee7d7
Gitweb: https://git.kernel.org/tip/f9781bb18ed828e7b83b7bac4a4ad7cd497ee7d7
Author: Jane Chu <jane.chu@oracle.com>
AuthorDate: Fri, 26 Aug 2022 17:38:51 -06:00
Committer: Borislav Petkov <bp@suse.de>
CommitterDate: Mon, 29 Aug 2022 09:33:42 +02:00
x86/mce: Retrieve poison range from hardware
When memory poison consumption machine checks fire, MCE notifier
handlers like nfit_handle_mce() record the impacted physical address
range which is reported by the hardware in the MCi_MISC MSR. The error
information includes data about blast radius, i.e. how many cachelines
did the hardware determine are impacted. A recent change
7917f9cdb503 ("acpi/nfit: rely on mce->misc to determine poison granularity")
updated nfit_handle_mce() to stop hard coding the blast radius value of
1 cacheline, and instead rely on the blast radius reported in 'struct
mce' which can be up to 4K (64 cachelines).
It turns out that apei_mce_report_mem_error() had a similar problem in
that it hard coded a blast radius of 4K rather than reading the blast
radius from the error information. Fix apei_mce_report_mem_error() to
convey the proper poison granularity.
Signed-off-by: Jane Chu <jane.chu@oracle.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Link: https://lore.kernel.org/r/7ed50fd8-521e-cade-77b1-738b8bfb8502@oracle.com
Link: https://lore.kernel.org/r/20220826233851.1319100-1-jane.chu@oracle.com
---
arch/x86/kernel/cpu/mce/apei.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kernel/cpu/mce/apei.c b/arch/x86/kernel/cpu/mce/apei.c
index 7171929..8ed3417 100644
--- a/arch/x86/kernel/cpu/mce/apei.c
+++ b/arch/x86/kernel/cpu/mce/apei.c
@@ -29,15 +29,26 @@
void apei_mce_report_mem_error(int severity, struct cper_sec_mem_err *mem_err)
{
struct mce m;
+ int lsb;
if (!(mem_err->validation_bits & CPER_MEM_VALID_PA))
return;
+ /*
+ * Even if the ->validation_bits are set for address mask,
+ * to be extra safe, check and reject an error radius '0',
+ * and fall back to the default page size.
+ */
+ if (mem_err->validation_bits & CPER_MEM_VALID_PA_MASK)
+ lsb = find_first_bit((void *)&mem_err->physical_addr_mask, PAGE_SHIFT);
+ else
+ lsb = PAGE_SHIFT;
+
mce_setup(&m);
m.bank = -1;
/* Fake a memory read error with unknown channel */
m.status = MCI_STATUS_VAL | MCI_STATUS_EN | MCI_STATUS_ADDRV | MCI_STATUS_MISCV | 0x9f;
- m.misc = (MCI_MISC_ADDR_PHYS << 6) | PAGE_SHIFT;
+ m.misc = (MCI_MISC_ADDR_PHYS << 6) | lsb;
if (severity >= GHES_SEV_RECOVERABLE)
m.status |= MCI_STATUS_UC;
prev parent reply other threads:[~2022-08-29 8:11 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-11 23:26 [PATCH] acpi/nfit: badrange report spill over to clean range Jane Chu
2022-07-13 0:48 ` Dan Williams
2022-07-13 23:52 ` Jane Chu
2022-07-14 0:24 ` Dan Williams
2022-07-14 23:22 ` Jane Chu
2022-07-15 0:58 ` Dan Williams
2022-07-15 17:38 ` Jane Chu
2022-07-15 1:19 ` Dan Williams
2022-07-15 17:26 ` Jane Chu
2022-07-15 19:17 ` Dan Williams
2022-07-15 22:46 ` Jane Chu
2022-08-29 8:11 ` tip-bot2 for Jane Chu [this message]
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