From: Mukesh Ojha <quic_mojha@quicinc.com>
To: <agross@kernel.org>, <andersson@kernel.org>,
<konrad.dybcio@linaro.org>, <linus.walleij@linaro.org>
Cc: <linux-arm-msm@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
"Mukesh Ojha" <quic_mojha@quicinc.com>
Subject: [PATCH v10 1/4] firmware: qcom: scm: provide a read-modify-write function
Date: Thu, 2 Nov 2023 22:44:04 +0530 [thread overview]
Message-ID: <1698945247-16033-2-git-send-email-quic_mojha@quicinc.com> (raw)
In-Reply-To: <1698945247-16033-1-git-send-email-quic_mojha@quicinc.com>
It was realized by Srinivas K. that there is a need of
read-modify-write scm exported function so that it can
be used by multiple clients.
Let's introduce qcom_scm_io_rmw() which masks out the bits
and write the passed value to that bit-offset.
Suggested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
Tested-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> # IPQ9574 and IPQ5332
---
drivers/firmware/qcom/qcom_scm.c | 26 ++++++++++++++++++++++++++
include/linux/firmware/qcom/qcom_scm.h | 1 +
2 files changed, 27 insertions(+)
diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_scm.c
index 520de9b5633a..25549178a30f 100644
--- a/drivers/firmware/qcom/qcom_scm.c
+++ b/drivers/firmware/qcom/qcom_scm.c
@@ -19,6 +19,7 @@
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/platform_device.h>
+#include <linux/spinlock.h>
#include <linux/reset-controller.h>
#include <linux/types.h>
@@ -41,6 +42,8 @@ struct qcom_scm {
int scm_vote_count;
u64 dload_mode_addr;
+ /* Atomic context only */
+ spinlock_t lock;
};
struct qcom_scm_current_perm_info {
@@ -481,6 +484,28 @@ static int qcom_scm_disable_sdi(void)
return ret ? : res.result[0];
}
+int qcom_scm_io_rmw(phys_addr_t addr, unsigned int mask, unsigned int val)
+{
+ unsigned int old, new;
+ int ret;
+
+ if (!__scm)
+ return -EINVAL;
+
+ spin_lock(&__scm->lock);
+ ret = qcom_scm_io_readl(addr, &old);
+ if (ret)
+ goto unlock;
+
+ new = (old & ~mask) | (val & mask);
+
+ ret = qcom_scm_io_writel(addr, new);
+unlock:
+ spin_unlock(&__scm->lock);
+ return ret;
+}
+EXPORT_SYMBOL_GPL(qcom_scm_io_rmw);
+
static int __qcom_scm_set_dload_mode(struct device *dev, bool enable)
{
struct qcom_scm_desc desc = {
@@ -1824,6 +1849,7 @@ static int qcom_scm_probe(struct platform_device *pdev)
return ret;
mutex_init(&scm->scm_bw_lock);
+ spin_lock_init(&scm->lock);
scm->path = devm_of_icc_get(&pdev->dev, NULL);
if (IS_ERR(scm->path))
diff --git a/include/linux/firmware/qcom/qcom_scm.h b/include/linux/firmware/qcom/qcom_scm.h
index ccaf28846054..3a8bb2e603b3 100644
--- a/include/linux/firmware/qcom/qcom_scm.h
+++ b/include/linux/firmware/qcom/qcom_scm.h
@@ -82,6 +82,7 @@ bool qcom_scm_pas_supported(u32 peripheral);
int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val);
int qcom_scm_io_writel(phys_addr_t addr, unsigned int val);
+int qcom_scm_io_rmw(phys_addr_t addr, unsigned int mask, unsigned int val);
bool qcom_scm_restore_sec_cfg_available(void);
int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare);
--
2.7.4
next prev parent reply other threads:[~2023-11-02 17:15 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-02 17:14 [PATCH v10 0/4] Misc SCM driver changes Mukesh Ojha
2023-11-02 17:14 ` Mukesh Ojha [this message]
2023-11-02 17:14 ` [PATCH v10 2/4] firmware: qcom: scm: Modify only the download bits in TCSR register Mukesh Ojha
2023-11-02 17:14 ` [PATCH v10 3/4] firmware: qcom: scm: Rework dload mode availability check Mukesh Ojha
2023-11-02 17:14 ` [PATCH v10 4/4] pinctrl: qcom: Use qcom_scm_io_rmw() function Mukesh Ojha
2023-11-27 19:50 ` [PATCH v10 0/4] Misc SCM driver changes Mukesh Ojha
2023-12-15 14:44 ` Mukesh Ojha
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