From: Paul Mackerras <paulus@samba.org>
To: Marcelo Tosatti <marcelo.tosatti@cyclades.com>
Cc: Jeff Garzik <jgarzik@pobox.com>,
linux-ppc-embedded <linuxppc-embedded@ozlabs.org>,
linux-kernel@vger.kernel.org,
Russell King <rmk+lkml@arm.linux.org.uk>,
Dan Malek <dan@embeddededge.com>,
Pantelis Antoniou <panto@intracom.gr>
Subject: Re: [PATCH] MPC8xx PCMCIA driver
Date: Tue, 30 Aug 2005 14:32:29 +1000 [thread overview]
Message-ID: <17171.57693.981385.165290@cargo.ozlabs.ibm.com> (raw)
In-Reply-To: <20050830035338.GA5755@dmt.cnet>
Marcelo Tosatti writes:
> The memory map structure which contains device configuration/registers
> is _always_ directly mapped with pte's (the 8xx is a chip with builtin
> UART/network/etc functionality).
>
> I don't think there is a need to use read/write acessors.
Generally on PowerPC you need to use at least the eieio instruction to
prevent reordering of the loads and stores to the device. It's
possible that 8xx is sufficiently in-order that you get away without
putting in barrier instructions (eieio or sync), but it's not good
practice to omit them.
You can use accessors such as in_be32 and in_le32 in this situation,
when you have a kernel virtual address that is already mapped to the
device.
Regards,
Paul.
next prev parent reply other threads:[~2005-08-30 4:32 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-08-30 2:48 Marcelo Tosatti
2005-08-30 3:39 ` Jeff Garzik
2005-08-30 3:53 ` Marcelo Tosatti
2005-08-30 4:32 ` Paul Mackerras [this message]
2005-08-30 15:07 ` Marcelo Tosatti
2005-08-30 4:33 ` Jeff Garzik
2005-08-30 7:06 ` Russell King
2005-09-01 8:53 ` Dominik Brodowski
2005-09-01 11:44 ` Magnus Damm
2005-09-01 14:51 ` Marcelo Tosatti
2005-09-14 14:11 ` Marcelo Tosatti
2005-09-14 14:27 ` Dominik Brodowski
2005-09-14 18:21 ` Marcelo Tosatti
2005-09-14 18:46 ` Jeff Garzik
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