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From: Sean Christopherson <seanjc@google.com>
To: Sean Christopherson <seanjc@google.com>,
	Paolo Bonzini <pbonzini@redhat.com>
Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
	 Sandipan Das <sandipan.das@amd.com>,
	Jim Mattson <jmattson@google.com>,
	 Like Xu <like.xu.linux@gmail.com>
Subject: Re: [PATCH 00/10] KVM: x86: Fix LVTPC masking on AMD CPUs
Date: Tue, 11 Jun 2024 18:18:38 -0700	[thread overview]
Message-ID: <171814092212.327582.678141675142575232.b4-ty@google.com> (raw)
In-Reply-To: <20240405235603.1173076-1-seanjc@google.com>

On Fri, 05 Apr 2024 16:55:53 -0700, Sean Christopherson wrote:
> This is kinda sorta v2 of Sandipan's fix for KVM's incorrect setting of
> the MASK bit when delivering PMIs through the LVTPC.
> 
> It's a bit rushed, as I want to get Sandipan's fix applied early next
> week so that it can make its way to Linus' tree for -rc4.  And I didn't
> want to apply Sandipan's patch as-is, because I'm a little paranoid that
> the guest CPUID check could be noticeable slow, and it's easy to avoid.
> 
> [...]

Applied 3-10 to kvm-x86 misc (1-2 went into 6.9).

[01/10] KVM: x86: Snapshot if a vCPU's vendor model is AMD vs. Intel compatible
        (previously applied)
[02/10] KVM: x86/pmu: Do not mask LVTPC when handling a PMI on AMD platforms
        (previously applied)
[03/10] KVM: x86/pmu: Squash period for checkpointed events based on host HLE/RTM
        https://github.com/kvm-x86/linux/commit/5a4f8b3026fc
[04/10] KVM: x86: Apply Intel's TSC_AUX reserved-bit behavior to Intel compat vCPUs
        https://github.com/kvm-x86/linux/commit/6463e5e41842
[05/10] KVM: x86: Inhibit code #DBs in MOV-SS shadow for all Intel compat vCPUs
        https://github.com/kvm-x86/linux/commit/c092fc879f99
[06/10] KVM: x86: Use "is Intel compatible" helper to emulate SYSCALL in !64-bit
        https://github.com/kvm-x86/linux/commit/d99e4cb2ae2e
[07/10] KVM: SVM: Emulate SYSENTER RIP/RSP behavior for all Intel compat vCPUs
        https://github.com/kvm-x86/linux/commit/dc2b8b2b524a
[08/10] KVM: x86: Allow SYSENTER in Compatibility Mode for all Intel compat vCPUs
        https://github.com/kvm-x86/linux/commit/4067c2395e80
[09/10] KVM: x86: Open code vendor_intel() in string_registers_quirk()
        https://github.com/kvm-x86/linux/commit/bdaff4f92bce
[10/10] KVM: x86: Bury guest_cpuid_is_amd_or_hygon() in cpuid.c
        https://github.com/kvm-x86/linux/commit/1028893a73fe

--
https://github.com/kvm-x86/linux/tree/next

      parent reply	other threads:[~2024-06-12  1:21 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-05 23:55 Sean Christopherson
2024-04-05 23:55 ` [PATCH 01/10] KVM: x86: Snapshot if a vCPU's vendor model is AMD vs. Intel compatible Sean Christopherson
2024-04-05 23:55 ` [PATCH 02/10] KVM: x86/pmu: Do not mask LVTPC when handling a PMI on AMD platforms Sean Christopherson
2024-04-05 23:55 ` [PATCH 03/10] KVM: x86/pmu: Squash period for checkpointed events based on host HLE/RTM Sean Christopherson
2024-04-05 23:55 ` [PATCH 04/10] KVM: x86: Apply Intel's TSC_AUX reserved-bit behavior to Intel compat vCPUs Sean Christopherson
2024-04-05 23:55 ` [PATCH 05/10] KVM: x86: Inhibit code #DBs in MOV-SS shadow for all " Sean Christopherson
2024-04-05 23:55 ` [PATCH 06/10] KVM: x86: Use "is Intel compatible" helper to emulate SYSCALL in !64-bit Sean Christopherson
2024-04-05 23:56 ` [PATCH 07/10] KVM: SVM: Emulate SYSENTER RIP/RSP behavior for all Intel compat vCPUs Sean Christopherson
2024-04-05 23:56 ` [PATCH 08/10] KVM: x86: Allow SYSENTER in Compatibility Mode " Sean Christopherson
2024-04-05 23:56 ` [PATCH 09/10] KVM: x86: Open code vendor_intel() in string_registers_quirk() Sean Christopherson
2024-04-05 23:56 ` [PATCH 10/10] KVM: x86: Bury guest_cpuid_is_amd_or_hygon() in cpuid.c Sean Christopherson
2024-04-09  2:01 ` [PATCH 00/10] KVM: x86: Fix LVTPC masking on AMD CPUs Sean Christopherson
2024-04-11 17:03 ` Paolo Bonzini
2024-06-12  1:18 ` Sean Christopherson [this message]

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