[PATCH v4 0/6] Refine i.MX8QM SATA based on generic PHY callbacks

[Richard Zhu <hongxing.zhu@nxp.com>]

V4 main changes:
Thanks for Niklas' comments.
- Update the commit message in #2 patch of v4.
- Split the clean up unrelated codes to #3 and #4 of v4.
- Remove the Cc: stable@vger.kernel.org and Fixes tag in #5 of v4.

V3 main changes:
- Use GENMASK() macro to define the _MASK.
- Refine the macro names.

V2 main changes:
- Add Rob's reviewed-by in the binding patch.
- Re-name the error out lables and new RXWM macro more descriptive.
- In #3 patch, add one fix tag, and CC stable kernel.

Based on i.MX8QM HSIO PHY driver, refine i.MX8QM SATA driver by using PHY
interface.

[PATCH v4 1/6] dt-bindings: ata: Add i.MX8QM AHCI compatible string
[PATCH v4 2/6] ata: ahci_imx: Clean up code by using i.MX8Q HSIO PHY
[PATCH v4 3/6] ata: ahci_imx: AHB clock rate setting is not required
[PATCH v4 4/6] ata: ahci_imx: Add 32bits DMA limit for i.MX8QM AHCI
[PATCH v4 5/6] ata: ahci_imx: Enlarge RX water mark for i.MX8QM SATA
[PATCH v4 6/6] ata: ahci_imx: Correct the email address

Documentation/devicetree/bindings/ata/imx-sata.yaml |  47 +++++++++++
drivers/ata/ahci_imx.c                              | 406 ++++++++++++++++++++++++-----------------------------------------------------------------
2 files changed, 155 insertions(+), 298 deletions(-)