Re: [PATCH v4 4/6] ata: ahci_imx: Add 32bits DMA limit for i.MX8QM AHCI SATA

[Niklas Cassel <cassel@kernel.org>]

On Thu, Aug 08, 2024 at 10:03:17AM -0400, Frank Li wrote:
> On Thu, Aug 08, 2024 at 12:35:01AM +0200, Niklas Cassel wrote:
> > On Fri, Aug 02, 2024 at 02:30:45AM +0000, Hongxing Zhu wrote:
> > > >
> > > Hi Niklas:
> > > I'm so sorry to reply late.
> > > About the 32bit DMA limitation of i.MX8QM AHCI SATA.
> > > It's seems that one "dma-ranges" property in the DT can let i.MX8QM SATA
> > >  works fine in my past days tests without this commit.
> > > How about drop these driver changes, and add "dma-ranges" for i.MX8QM SATA?
> > > Thanks a lot for your kindly help.
> >
> > Hello Richard,
> >
> > did you try my suggested patch above?
> >
> >
> > If you look at dma-ranges:
> > https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#dma-ranges
> >
> > "dma-ranges" property should be used on a bus device node
> > (such as PCI host bridges).
> 
> Yes, 32bit is limited by internal bus farbic, not AHCI controller.

If the limit is by the interconnect/bus, then the limit will affect all
devices connected to that bus, i.e. both the PCIe controller and the AHCI
controller, and using "dma-ranges" in that case is of course correct.

I guess I'm mostly surprised that i.MX8QM doesn't already have this
property defined in its device tree.

Anyway, please send a v5 of this series without the patch in $subject,
and we should be able to queue it up for 6.12.


Kind regards,
Niklas