[GIT PULL] RISC-V Fixes for 6.11-rc2

[GIT PULL] RISC-V Fixes for 6.11-rc2

[Palmer Dabbelt]

The following changes since commit 8400291e289ee6b2bf9779ff1c83a291501f017b:

  Linux 6.11-rc1 (2024-07-28 14:19:55 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-6.11-rc2

for you to fetch changes up to 3b6564427aea83b7a35a15ca278291d50a1edcfc:

  riscv: Fix linear mapping checks for non-contiguous memory regions (2024-08-01 11:46:09 -0700)

----------------------------------------------------------------
RISC-V Fixes for 6.11-rc2

* A fix to avoid dropping some of the internal pseudo-extensions, which
  breaks *envcfg dependency parsing.
* The kernel entry address is now aligned in purgatory, which avoids a
  misaligned load that can lead to crash on systems that don't support
  misaligned accesses early in boot.
* The FW_SFENCE_VMA_RECEIVED perf event was duplicated in a handful of
  perf JSON configurations, one of them been updated to
  FW_SFENCE_VMA_ASID_SENT.
* The starfive cache driver is now restricted to 64-bit systems, as it
  isn't 32-bit clean.
* A fix for to avoid aliasing legacy-mode perf counters with software
  perf counters.
* VM_FAULT_SIGSEGV is now handled in the page fault code.
* A fix for stalls during CPU hotplug due to IPIs being disabled.
* A fix for memblock bounds checking.  This manifests as a crash on
  systems with discontinuous memory maps that have regions that don't
  fit in the linear map.

----------------------------------------------------------------
Daniel Maslowski (1):
      riscv/purgatory: align riscv_kernel_entry

Eric Lin (1):
      perf arch events: Fix duplicate RISC-V SBI firmware event name

Nick Hu (1):
      RISC-V: Enable the IPI before workqueue_online_cpu()

Palmer Dabbelt (1):
      cache: StarFive: Require a 64-bit system

Samuel Holland (1):
      riscv: cpufeature: Do not drop Linux-internal extensions

Shifrin Dmitry (1):
      perf: riscv: Fix selecting counters in legacy mode

Stuart Menefy (1):
      riscv: Fix linear mapping checks for non-contiguous memory regions

Zhe Qiao (1):
      riscv/mm: Add handling for VM_FAULT_SIGSEGV in mm_fault_error()

 arch/riscv/kernel/cpufeature.c                          | 14 ++++++--------
 arch/riscv/kernel/sbi-ipi.c                             |  2 +-
 arch/riscv/mm/fault.c                                   | 17 +++++++++--------
 arch/riscv/mm/init.c                                    | 15 +++++++++++----
 arch/riscv/purgatory/entry.S                            |  2 ++
 drivers/cache/Kconfig                                   |  1 +
 drivers/perf/riscv_pmu_sbi.c                            |  2 +-
 include/linux/cpuhotplug.h                              |  1 +
 .../perf/pmu-events/arch/riscv/andes/ax45/firmware.json |  2 +-
 .../perf/pmu-events/arch/riscv/riscv-sbi-firmware.json  |  2 +-
 .../perf/pmu-events/arch/riscv/sifive/u74/firmware.json |  2 +-
 .../arch/riscv/starfive/dubhe-80/firmware.json          |  2 +-
 .../arch/riscv/thead/c900-legacy/firmware.json          |  2 +-
 13 files changed, 37 insertions(+), 27 deletions(-)

Re: [GIT PULL] RISC-V Fixes for 6.11-rc2

[pr-tracker-bot]

The pull request you sent on Fri, 02 Aug 2024 08:44:50 -0700 (PDT):

> git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-6.11-rc2

has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/948752d2e010e11b56a877975e7e9158d6d31823

Thank you!

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