From: Bjorn Andersson <andersson@kernel.org>
To: Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Krishna chaitanya chundru <quic_krichai@quicinc.com>
Cc: dmitry.baryshkov@linaro.org, manivannan.sadhasivam@linaro.org,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] arm64: dts: qcom: qcs6490-rb3gen2: Add PCIe nodes
Date: Thu, 24 Oct 2024 10:43:43 -0500 [thread overview]
Message-ID: <172978462070.300538.13331718382889000397.b4-ty@kernel.org> (raw)
In-Reply-To: <20241024-enable_pcie-v2-1-e5a6f5da74e4@quicinc.com>
On Thu, 24 Oct 2024 18:58:49 +0530, Krishna chaitanya chundru wrote:
> Enable PCIe1 controller and its corresponding PHY nodes on
> qcs6490-rb3g2 platform.
>
> SMMU v2 has limited SID's to assign dynamic SID's with the existing
> logic. For now, use static iommu-map table assigning unique SID's for
> each port as dynamic approach needs boarder community discussions.
>
> [...]
Applied, thanks!
[1/1] arm64: dts: qcom: qcs6490-rb3gen2: Add PCIe nodes
commit: 267643b3e3a4e6cb7996da77f6d7f89ed8f5d554
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
prev parent reply other threads:[~2024-10-24 15:43 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-24 13:28 Krishna chaitanya chundru
2024-10-24 15:43 ` Bjorn Andersson [this message]
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