* [PATCH 1/4] arm64: dts: ti: k3-j7200: Fix clock ids for MCSPI instances
2024-10-23 10:45 [PATCH 0/4] MCSPI clock ID fixes for J7200/J721E/J721S2/J784S4 Anurag Dutta
@ 2024-10-23 10:45 ` Anurag Dutta
2024-10-24 6:22 ` Aniket Limaye
2024-10-23 10:45 ` [PATCH 2/4] arm64: dts: ti: k3-j721e: Fix clock IDs " Anurag Dutta
` (3 subsequent siblings)
4 siblings, 1 reply; 7+ messages in thread
From: Anurag Dutta @ 2024-10-23 10:45 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, vaishnav.a, j-keerthy
Cc: linux-arm-kernel, devicetree, linux-kernel, u-kumar1
The clock IDs for multiple MCSPI instances across wakeup as
well as main domain in J7200 are incorrect when compared with
documentation [1]. This results in kernel crashes when the said
instances are enabled. Fix the clock ids to their appropriate
values.
[1]https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j7200/clocks.html
Fixes: 8f6c475f4ca7 ("arm64: dts: ti: k3-j7200: Add MCSPI nodes")
Signed-off-by: Anurag Dutta <a-dutta@ti.com>
---
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 16 ++++++++--------
arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 6 +++---
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
index 9386bf3ef9f6..ee953c0bf11f 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
@@ -1145,7 +1145,7 @@ main_spi0: spi@2100000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 266 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 266 1>;
+ clocks = <&k3_clks 266 4>;
status = "disabled";
};
@@ -1156,7 +1156,7 @@ main_spi1: spi@2110000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 267 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 267 1>;
+ clocks = <&k3_clks 267 4>;
status = "disabled";
};
@@ -1167,7 +1167,7 @@ main_spi2: spi@2120000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 268 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 268 1>;
+ clocks = <&k3_clks 268 4>;
status = "disabled";
};
@@ -1178,7 +1178,7 @@ main_spi3: spi@2130000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 269 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 269 1>;
+ clocks = <&k3_clks 269 4>;
status = "disabled";
};
@@ -1189,7 +1189,7 @@ main_spi4: spi@2140000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 270 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 270 1>;
+ clocks = <&k3_clks 270 2>;
status = "disabled";
};
@@ -1200,7 +1200,7 @@ main_spi5: spi@2150000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 271 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 271 1>;
+ clocks = <&k3_clks 271 4>;
status = "disabled";
};
@@ -1211,7 +1211,7 @@ main_spi6: spi@2160000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 272 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 272 1>;
+ clocks = <&k3_clks 272 4>;
status = "disabled";
};
@@ -1222,7 +1222,7 @@ main_spi7: spi@2170000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 273 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 273 1>;
+ clocks = <&k3_clks 273 4>;
status = "disabled";
};
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
index 5097d192c2b2..b18b2f2deb96 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
@@ -494,7 +494,7 @@ mcu_spi0: spi@40300000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 274 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 274 0>;
+ clocks = <&k3_clks 274 4>;
status = "disabled";
};
@@ -505,7 +505,7 @@ mcu_spi1: spi@40310000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 275 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 275 0>;
+ clocks = <&k3_clks 275 4>;
status = "disabled";
};
@@ -516,7 +516,7 @@ mcu_spi2: spi@40320000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 276 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 276 0>;
+ clocks = <&k3_clks 276 2>;
status = "disabled";
};
--
2.34.1
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH 1/4] arm64: dts: ti: k3-j7200: Fix clock ids for MCSPI instances
2024-10-23 10:45 ` [PATCH 1/4] arm64: dts: ti: k3-j7200: Fix clock ids for MCSPI instances Anurag Dutta
@ 2024-10-24 6:22 ` Aniket Limaye
0 siblings, 0 replies; 7+ messages in thread
From: Aniket Limaye @ 2024-10-24 6:22 UTC (permalink / raw)
To: Anurag Dutta, nm, vigneshr, kristo, robh, krzk+dt, conor+dt,
vaishnav.a, j-keerthy
Cc: linux-arm-kernel, devicetree, linux-kernel, u-kumar1
On 23/10/24 16:15, Anurag Dutta wrote:
> The clock IDs for multiple MCSPI instances across wakeup as
> well as main domain in J7200 are incorrect when compared with
> documentation [1]. This results in kernel crashes when the said
> instances are enabled. Fix the clock ids to their appropriate
> values.
>
> [1]https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j7200/clocks.html
>
> Fixes: 8f6c475f4ca7 ("arm64: dts: ti: k3-j7200: Add MCSPI nodes")
>
> Signed-off-by: Anurag Dutta <a-dutta@ti.com>
Reviewed-by: Aniket Limaye <a-limaye@ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 16 ++++++++--------
> arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 6 +++---
> 2 files changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> index 9386bf3ef9f6..ee953c0bf11f 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> @@ -1145,7 +1145,7 @@ main_spi0: spi@2100000 {
> #address-cells = <1>;
> #size-cells = <0>;
> power-domains = <&k3_pds 266 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 266 1>;
> + clocks = <&k3_clks 266 4>;
> status = "disabled";
> };
>
> @@ -1156,7 +1156,7 @@ main_spi1: spi@2110000 {
> #address-cells = <1>;
> #size-cells = <0>;
> power-domains = <&k3_pds 267 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 267 1>;
> + clocks = <&k3_clks 267 4>;
> status = "disabled";
> };
>
> @@ -1167,7 +1167,7 @@ main_spi2: spi@2120000 {
> #address-cells = <1>;
> #size-cells = <0>;
> power-domains = <&k3_pds 268 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 268 1>;
> + clocks = <&k3_clks 268 4>;
> status = "disabled";
> };
>
> @@ -1178,7 +1178,7 @@ main_spi3: spi@2130000 {
> #address-cells = <1>;
> #size-cells = <0>;
> power-domains = <&k3_pds 269 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 269 1>;
> + clocks = <&k3_clks 269 4>;
> status = "disabled";
> };
>
> @@ -1189,7 +1189,7 @@ main_spi4: spi@2140000 {
> #address-cells = <1>;
> #size-cells = <0>;
> power-domains = <&k3_pds 270 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 270 1>;
> + clocks = <&k3_clks 270 2>;
> status = "disabled";
> };
>
> @@ -1200,7 +1200,7 @@ main_spi5: spi@2150000 {
> #address-cells = <1>;
> #size-cells = <0>;
> power-domains = <&k3_pds 271 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 271 1>;
> + clocks = <&k3_clks 271 4>;
> status = "disabled";
> };
>
> @@ -1211,7 +1211,7 @@ main_spi6: spi@2160000 {
> #address-cells = <1>;
> #size-cells = <0>;
> power-domains = <&k3_pds 272 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 272 1>;
> + clocks = <&k3_clks 272 4>;
> status = "disabled";
> };
>
> @@ -1222,7 +1222,7 @@ main_spi7: spi@2170000 {
> #address-cells = <1>;
> #size-cells = <0>;
> power-domains = <&k3_pds 273 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 273 1>;
> + clocks = <&k3_clks 273 4>;
> status = "disabled";
> };
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> index 5097d192c2b2..b18b2f2deb96 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> @@ -494,7 +494,7 @@ mcu_spi0: spi@40300000 {
> #address-cells = <1>;
> #size-cells = <0>;
> power-domains = <&k3_pds 274 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 274 0>;
> + clocks = <&k3_clks 274 4>;
> status = "disabled";
> };
>
> @@ -505,7 +505,7 @@ mcu_spi1: spi@40310000 {
> #address-cells = <1>;
> #size-cells = <0>;
> power-domains = <&k3_pds 275 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 275 0>;
> + clocks = <&k3_clks 275 4>;
> status = "disabled";
> };
>
> @@ -516,7 +516,7 @@ mcu_spi2: spi@40320000 {
> #address-cells = <1>;
> #size-cells = <0>;
> power-domains = <&k3_pds 276 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 276 0>;
> + clocks = <&k3_clks 276 2>;
> status = "disabled";
> };
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 2/4] arm64: dts: ti: k3-j721e: Fix clock IDs for MCSPI instances
2024-10-23 10:45 [PATCH 0/4] MCSPI clock ID fixes for J7200/J721E/J721S2/J784S4 Anurag Dutta
2024-10-23 10:45 ` [PATCH 1/4] arm64: dts: ti: k3-j7200: Fix clock ids for MCSPI instances Anurag Dutta
@ 2024-10-23 10:45 ` Anurag Dutta
2024-10-23 10:45 ` [PATCH 3/4] arm64: dts: ti: k3-j721s2: " Anurag Dutta
` (2 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Anurag Dutta @ 2024-10-23 10:45 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, vaishnav.a, j-keerthy
Cc: linux-arm-kernel, devicetree, linux-kernel, u-kumar1
The clock IDs for multiple MCSPI instances across wakeup domain
in J721e are incorrect when compared with documentation [1]. Fix
the clock ids to their appropriate values.
[1]https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j721e/clocks.html
Fixes: 76aa309f9fa7 ("arm64: dts: ti: k3-j721e: Add MCSPI nodes")
Signed-off-by: Anurag Dutta <a-dutta@ti.com>
---
arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
index 3731ffb4a5c9..6f5c1401ebd6 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
@@ -654,7 +654,7 @@ mcu_spi0: spi@40300000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 274 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 274 0>;
+ clocks = <&k3_clks 274 1>;
status = "disabled";
};
@@ -665,7 +665,7 @@ mcu_spi1: spi@40310000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 275 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 275 0>;
+ clocks = <&k3_clks 275 1>;
status = "disabled";
};
@@ -676,7 +676,7 @@ mcu_spi2: spi@40320000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 276 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 276 0>;
+ clocks = <&k3_clks 276 1>;
status = "disabled";
};
--
2.34.1
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH 3/4] arm64: dts: ti: k3-j721s2: Fix clock IDs for MCSPI instances
2024-10-23 10:45 [PATCH 0/4] MCSPI clock ID fixes for J7200/J721E/J721S2/J784S4 Anurag Dutta
2024-10-23 10:45 ` [PATCH 1/4] arm64: dts: ti: k3-j7200: Fix clock ids for MCSPI instances Anurag Dutta
2024-10-23 10:45 ` [PATCH 2/4] arm64: dts: ti: k3-j721e: Fix clock IDs " Anurag Dutta
@ 2024-10-23 10:45 ` Anurag Dutta
2024-10-23 10:45 ` [PATCH 4/4] arm64: dts: ti: k3-j784s4: " Anurag Dutta
2024-10-30 4:54 ` (subset) [PATCH 0/4] MCSPI clock ID fixes for J7200/J721E/J721S2/J784S4 Vignesh Raghavendra
4 siblings, 0 replies; 7+ messages in thread
From: Anurag Dutta @ 2024-10-23 10:45 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, vaishnav.a, j-keerthy
Cc: linux-arm-kernel, devicetree, linux-kernel, u-kumar1
The clock IDs for multiple MCSPI instances across wakeup domain
in J721s2 are incorrect when compared with documentation [1]. Fix the
clock IDs to their appropriate values.
[1]https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j721s2/clocks.html
Fixes: 04d7cb647b85 ("arm64: dts: ti: k3-j721s2: Add MCSPI nodes")
Signed-off-by: Anurag Dutta <a-dutta@ti.com>
---
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 16 ++++++++--------
arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 6 +++---
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
index 9ed6949b40e9..fae534b5c8a4 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
@@ -1708,7 +1708,7 @@ main_spi0: spi@2100000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 339 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 339 1>;
+ clocks = <&k3_clks 339 2>;
status = "disabled";
};
@@ -1719,7 +1719,7 @@ main_spi1: spi@2110000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 340 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 340 1>;
+ clocks = <&k3_clks 340 2>;
status = "disabled";
};
@@ -1730,7 +1730,7 @@ main_spi2: spi@2120000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 341 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 341 1>;
+ clocks = <&k3_clks 341 2>;
status = "disabled";
};
@@ -1741,7 +1741,7 @@ main_spi3: spi@2130000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 342 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 342 1>;
+ clocks = <&k3_clks 342 2>;
status = "disabled";
};
@@ -1752,7 +1752,7 @@ main_spi4: spi@2140000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 343 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 343 1>;
+ clocks = <&k3_clks 343 2>;
status = "disabled";
};
@@ -1763,7 +1763,7 @@ main_spi5: spi@2150000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 344 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 344 1>;
+ clocks = <&k3_clks 344 2>;
status = "disabled";
};
@@ -1774,7 +1774,7 @@ main_spi6: spi@2160000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 345 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 345 1>;
+ clocks = <&k3_clks 345 2>;
status = "disabled";
};
@@ -1785,7 +1785,7 @@ main_spi7: spi@2170000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 346 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 346 1>;
+ clocks = <&k3_clks 346 2>;
status = "disabled";
};
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
index 9d96b19d0e7c..8232d308c23c 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
@@ -425,7 +425,7 @@ mcu_spi0: spi@40300000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 347 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 347 0>;
+ clocks = <&k3_clks 347 2>;
status = "disabled";
};
@@ -436,7 +436,7 @@ mcu_spi1: spi@40310000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 348 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 348 0>;
+ clocks = <&k3_clks 348 2>;
status = "disabled";
};
@@ -447,7 +447,7 @@ mcu_spi2: spi@40320000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 349 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 349 0>;
+ clocks = <&k3_clks 349 2>;
status = "disabled";
};
--
2.34.1
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH 4/4] arm64: dts: ti: k3-j784s4: Fix clock IDs for MCSPI instances
2024-10-23 10:45 [PATCH 0/4] MCSPI clock ID fixes for J7200/J721E/J721S2/J784S4 Anurag Dutta
` (2 preceding siblings ...)
2024-10-23 10:45 ` [PATCH 3/4] arm64: dts: ti: k3-j721s2: " Anurag Dutta
@ 2024-10-23 10:45 ` Anurag Dutta
2024-10-30 4:54 ` (subset) [PATCH 0/4] MCSPI clock ID fixes for J7200/J721E/J721S2/J784S4 Vignesh Raghavendra
4 siblings, 0 replies; 7+ messages in thread
From: Anurag Dutta @ 2024-10-23 10:45 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, vaishnav.a, j-keerthy
Cc: linux-arm-kernel, devicetree, linux-kernel, u-kumar1
The clock IDs for multiple MCSPI instances across wakeup domain
in J784s4 are incorrect when compared with documentation [1]. Fix
the clock IDs to their appropriate values.
[1]https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j784s4/clocks.html
Fixes: e23d5a3d116d ("arm64: dts: ti: k3-j784s4: Add MCSPI nodes")
Signed-off-by: Anurag Dutta <a-dutta@ti.com>
---
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
index e73bb750b09a..5c5398990514 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
@@ -2141,7 +2141,7 @@ main_spi0: spi@2100000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 376 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 376 1>;
+ clocks = <&k3_clks 376 0>;
status = "disabled";
};
@@ -2152,7 +2152,7 @@ main_spi1: spi@2110000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 377 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 377 1>;
+ clocks = <&k3_clks 377 0>;
status = "disabled";
};
@@ -2163,7 +2163,7 @@ main_spi2: spi@2120000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 378 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 378 1>;
+ clocks = <&k3_clks 378 0>;
status = "disabled";
};
@@ -2174,7 +2174,7 @@ main_spi3: spi@2130000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 379 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 379 1>;
+ clocks = <&k3_clks 379 0>;
status = "disabled";
};
@@ -2185,7 +2185,7 @@ main_spi4: spi@2140000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 380 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 380 1>;
+ clocks = <&k3_clks 380 0>;
status = "disabled";
};
@@ -2196,7 +2196,7 @@ main_spi5: spi@2150000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 381 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 381 1>;
+ clocks = <&k3_clks 381 0>;
status = "disabled";
};
@@ -2207,7 +2207,7 @@ main_spi6: spi@2160000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 382 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 382 1>;
+ clocks = <&k3_clks 382 0>;
status = "disabled";
};
@@ -2218,7 +2218,7 @@ main_spi7: spi@2170000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 383 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 383 1>;
+ clocks = <&k3_clks 383 0>;
status = "disabled";
};
--
2.34.1
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: (subset) [PATCH 0/4] MCSPI clock ID fixes for J7200/J721E/J721S2/J784S4
2024-10-23 10:45 [PATCH 0/4] MCSPI clock ID fixes for J7200/J721E/J721S2/J784S4 Anurag Dutta
` (3 preceding siblings ...)
2024-10-23 10:45 ` [PATCH 4/4] arm64: dts: ti: k3-j784s4: " Anurag Dutta
@ 2024-10-30 4:54 ` Vignesh Raghavendra
4 siblings, 0 replies; 7+ messages in thread
From: Vignesh Raghavendra @ 2024-10-30 4:54 UTC (permalink / raw)
To: nm, kristo, robh, krzk+dt, conor+dt, vaishnav.a, j-keerthy, Anurag Dutta
Cc: Vignesh Raghavendra, linux-arm-kernel, devicetree, linux-kernel,
u-kumar1
Hi Anurag Dutta,
On Wed, 23 Oct 2024 16:15:28 +0530, Anurag Dutta wrote:
> This series fixes the clock IDs for MCSPI instances across:
> 1) Main and Wakeup domains in j7200
> 2) Wakeup domain in j721e
> 3) Main and wakeup domain in j721s2
> 4) Main domain in j784s4
J784s4 bits dont apply cleanly anymore. Please respin.
>
> In j7200, kernel crashes were observed due to incorrect clock IDs.
> In j721e/j721s2/j784s4, there was only a mismatch of clock IDs w.r.t
> documentation, however it did not trigger a crash. The clock IDs can be
> verified from the below links.
>
> [...]
I have applied the following to branch ti-k3-dts-next on [1].
Thank you!
[1/4] arm64: dts: ti: k3-j7200: Fix clock ids for MCSPI instances
commit: 3a47e381670f130870caef6e1155ac531b17b032
[2/4] arm64: dts: ti: k3-j721e: Fix clock IDs for MCSPI instances
commit: ab09a68f3be04b2f9d1fc7cfc0e2225025cb9421
[3/4] arm64: dts: ti: k3-j721s2: Fix clock IDs for MCSPI instances
commit: 891874f015e98f67ab2fda76f2e859921e136621
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
--
Vignesh
^ permalink raw reply [flat|nested] 7+ messages in thread