From: Bjorn Andersson <andersson@kernel.org>
To: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Luo Jie <quic_luoj@quicinc.com>
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, quic_kkumarcs@quicinc.com,
quic_suruchia@quicinc.com, quic_pavir@quicinc.com,
quic_linchen@quicinc.com, quic_leiwei@quicinc.com,
bartosz.golaszewski@linaro.org, srinivas.kandagatla@linaro.org,
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Subject: Re: (subset) [PATCH v8 0/5] Add CMN PLL clock controller driver for IPQ9574
Date: Tue, 7 Jan 2025 10:38:46 -0600 [thread overview]
Message-ID: <173626793388.69400.11516262692578602679.b4-ty@kernel.org> (raw)
In-Reply-To: <20250103-qcom_ipq_cmnpll-v8-0-c89fb4d4849d@quicinc.com>
On Fri, 03 Jan 2025 15:31:33 +0800, Luo Jie wrote:
> The CMN PLL clock controller in Qualcomm IPQ chipsets provides
> the clocks to the networking hardware blocks that are internal
> or external to the SoC, and to the GCC. This driver configures
> the CMN PLL clock controller to enable the output clocks. The
> networking blocks include the internal blocks such as PPE
> (Packet Process Engine) and PCS blocks, and external hardware
> such as Ethernet PHY or switch. The CMN PLL block also outputs
> fixed rate clocks to GCC, such as 24 MHZ as XO clock and 32 KHZ
> as sleep clock supplied to GCC.
>
> [...]
Applied, thanks!
[2/5] clk: qcom: Add CMN PLL clock controller driver for IPQ SoC
commit: f81715a4c87c3b75ca2640bb61b6c66506061a64
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
next prev parent reply other threads:[~2025-01-07 16:39 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-03 7:31 Luo Jie
2025-01-03 7:31 ` [PATCH v8 1/5] dt-bindings: clock: qcom: Add CMN PLL clock controller for IPQ SoC Luo Jie
2025-01-03 15:06 ` Krzysztof Kozlowski
2025-01-03 7:31 ` [PATCH v8 2/5] clk: qcom: Add CMN PLL clock controller driver " Luo Jie
2025-01-03 12:29 ` Konrad Dybcio
2025-01-03 7:31 ` [PATCH v8 3/5] arm64: defconfig: Enable Qualcomm IPQ CMN PLL clock controller Luo Jie
2025-01-03 7:31 ` [PATCH v8 4/5] arm64: dts: qcom: Add CMN PLL node for IPQ9574 SoC Luo Jie
2025-01-03 12:27 ` Konrad Dybcio
2025-01-03 7:31 ` [PATCH v8 5/5] arm64: dts: qcom: Update IPQ9574 xo_board_clk to use fixed factor clock Luo Jie
2025-01-07 16:38 ` Bjorn Andersson [this message]
2025-01-08 4:43 ` (subset) [PATCH v8 0/5] Add CMN PLL clock controller driver for IPQ9574 Bjorn Andersson
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