[PATCH v3 0/2] clk: rockchip: Fixed some incorrect commits

[PATCH v3 0/2] clk: rockchip: Fixed some incorrect commits

[Elaine Zhang]

Change in V3:
[PATCH v3 0/2]: As discussed in the email, assigned-clock-parents in DT.
[PATCH v3 1/2]: Merge patches into one. 

Change in V2:
[PATCH v2 0/3]: NO change
[PATCH v2 1/3]: Update commit message
[PATCH v2 2/3]: Update commit message

Elaine Zhang (2):
  ARM: dts: rockchip: assigned-clock-parents to SCLK_HDMI_PHY for
    DCLK_VOP
  arm64: dts: rockchip: Increase VOP clk rate on RK3328

 arch/arm/boot/dts/rockchip/rk322x.dtsi   |  2 ++
 arch/arm64/boot/dts/rockchip/rk3328.dtsi | 10 ++++++----
 2 files changed, 8 insertions(+), 4 deletions(-)

-- 
2.17.1

[PATCH v3 1/2] ARM: dts: rockchip: assigned-clock-parents to SCLK_HDMI_PHY for DCLK_VOP

[Elaine Zhang]

If dclk_vop use CLK_SET_RATE_PARENT and CLK_SET_RATE_NO_REPARENT
we should assign clk parent in DT to make it extra clear
that hdmiphy should be used as dclk_vop parent.

Fixes: 1d34b9757523 ("clk: rockchip: Set parent rate for DCLK_VOP clock on RK3228")
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
 arch/arm/boot/dts/rockchip/rk322x.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/rockchip/rk322x.dtsi b/arch/arm/boot/dts/rockchip/rk322x.dtsi
index 96421355c274..2eb3c6611e59 100644
--- a/arch/arm/boot/dts/rockchip/rk322x.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk322x.dtsi
@@ -667,6 +667,8 @@
 		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru ACLK_VOP>, <&cru DCLK_VOP>, <&cru HCLK_VOP>;
 		clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+		assigned-clocks = <&cru DCLK_VOP>;
+		assigned-clock-parents = <&cru SCLK_HDMI_PHY>;
 		resets = <&cru SRST_VOP_A>, <&cru SRST_VOP_H>, <&cru SRST_VOP_D>;
 		reset-names = "axi", "ahb", "dclk";
 		iommus = <&vop_mmu>;
-- 
2.17.1

[PATCH v3 2/2] arm64: dts: rockchip: Increase VOP clk rate on RK3328

[Elaine Zhang]

The VOP on RK3328 needs to run at a higher rate in order to produce
a proper 3840x2160 signal.
Change to use 300MHz for VIO clk and 400MHz for VOP clk.

Fixes: 0f2ddb128fa2 ("arm64: dts: rockchip: Increase VOP clk rate on RK3328")

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3328.dtsi | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 7d992c3c01ce..0c905f411e92 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -842,7 +842,8 @@
 			<&cru ACLK_BUS_PRE>, <&cru HCLK_BUS_PRE>,
 			<&cru PCLK_BUS_PRE>, <&cru ACLK_PERI_PRE>,
 			<&cru HCLK_PERI>, <&cru PCLK_PERI>,
-			<&cru SCLK_RTC32K>;
+			<&cru SCLK_RTC32K>, <&cru ACLK_VIO_PRE>,
+			<&cru ACLK_VOP_PRE>;
 		assigned-clock-parents =
 			<&cru HDMIPHY>, <&cru PLL_APLL>,
 			<&cru PLL_GPLL>, <&xin24m>,
@@ -852,8 +853,8 @@
 			<0>, <24000000>,
 			<24000000>, <24000000>,
 			<15000000>, <15000000>,
-			<300000000>, <100000000>,
-			<400000000>, <100000000>,
+			<100000000>, <100000000>,
+			<100000000>, <100000000>,
 			<50000000>, <100000000>,
 			<100000000>, <100000000>,
 			<50000000>, <50000000>,
@@ -863,7 +864,8 @@
 			<150000000>, <75000000>,
 			<75000000>, <150000000>,
 			<75000000>, <75000000>,
-			<32768>;
+			<32768>, <300000000>,
+			<400000000>;
 	};
 
 	usb2phy_grf: syscon@ff450000 {
-- 
2.17.1

Re: [PATCH v3 0/2] clk: rockchip: Fixed some incorrect commits

[Rob Herring (Arm)]

On Sat, 08 Feb 2025 09:57:55 +0800, Elaine Zhang wrote:
> Change in V3:
> [PATCH v3 0/2]: As discussed in the email, assigned-clock-parents in DT.
> [PATCH v3 1/2]: Merge patches into one.
> 
> Change in V2:
> [PATCH v2 0/3]: NO change
> [PATCH v2 1/3]: Update commit message
> [PATCH v2 2/3]: Update commit message
> 
> Elaine Zhang (2):
>   ARM: dts: rockchip: assigned-clock-parents to SCLK_HDMI_PHY for
>     DCLK_VOP
>   arm64: dts: rockchip: Increase VOP clk rate on RK3328
> 
>  arch/arm/boot/dts/rockchip/rk322x.dtsi   |  2 ++
>  arch/arm64/boot/dts/rockchip/rk3328.dtsi | 10 ++++++----
>  2 files changed, 8 insertions(+), 4 deletions(-)
> 
> --
> 2.17.1
> 
> 
> 


My bot found new DTB warnings on the .dts files added or changed in this
series.

Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.

If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:

  pip3 install dtschema --upgrade


New warnings running 'make CHECK_DTBS=y for arch/arm/boot/dts/rockchip/' for 20250208015757.27594-1-zhangqing@rock-chips.com:

arch/arm/boot/dts/rockchip/rk3228-evb.dtb: vop@20050000: assigned-clocks: [[2, 190]] is too short
	from schema $id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml#
arch/arm/boot/dts/rockchip/rk3228-evb.dtb: vop@20050000: 'assigned-clock-parents' does not match any of the regexes: 'pinctrl-[0-9]+'
	from schema $id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml#
arch/arm/boot/dts/rockchip/rk3229-xms6.dtb: vop@20050000: assigned-clocks: [[2, 190]] is too short
	from schema $id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml#
arch/arm/boot/dts/rockchip/rk3229-xms6.dtb: vop@20050000: 'assigned-clock-parents' does not match any of the regexes: 'pinctrl-[0-9]+'
	from schema $id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml#
arch/arm/boot/dts/rockchip/rk3229-evb.dtb: vop@20050000: assigned-clocks: [[2, 190]] is too short
	from schema $id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml#
arch/arm/boot/dts/rockchip/rk3229-evb.dtb: vop@20050000: 'assigned-clock-parents' does not match any of the regexes: 'pinctrl-[0-9]+'
	from schema $id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml#