mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Joel Fernandes <joelagnelf@nvidia.com>
To: Danilo Krummrich <dakr@kernel.org>,
	Alexandre Courbot <acourbot@nvidia.com>
Cc: "Miguel Ojeda" <ojeda@kernel.org>,
	"Alex Gaynor" <alex.gaynor@gmail.com>,
	"Boqun Feng" <boqun.feng@gmail.com>,
	"Gary Guo" <gary@garyguo.net>,
	"Björn Roy Baron" <bjorn3_gh@protonmail.com>,
	"Benno Lossin" <benno.lossin@proton.me>,
	"Andreas Hindborg" <a.hindborg@kernel.org>,
	"Alice Ryhl" <aliceryhl@google.com>,
	"Trevor Gross" <tmgross@umich.edu>,
	"David Airlie" <airlied@gmail.com>,
	"Simona Vetter" <simona@ffwll.ch>,
	"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
	"Maxime Ripard" <mripard@kernel.org>,
	"Thomas Zimmermann" <tzimmermann@suse.de>,
	"Jonathan Corbet" <corbet@lwn.net>,
	"John Hubbard" <jhubbard@nvidia.com>,
	"Ben Skeggs" <bskeggs@nvidia.com>,
	"Joel Fernandes" <joelagnelf@nvidia.com>,
	"Timur Tabi" <ttabi@nvidia.com>,
	"Alistair Popple" <apopple@nvidia.com>,
	linux-kernel@vger.kernel.org, rust-for-linux@vger.kernel.org,
	nouveau@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [13/16] gpu: nova-core: Add support for VBIOS ucode extraction for boot
Date: Sat, 26 Apr 2025 23:17:45 -0000	[thread overview]
Message-ID: <174570946562.876.14485782898212757811@patchwork.local> (raw)
In-Reply-To: <aAjz2CYTsAhidiEU@pollux>

Hello, Danilo,

On Wed, 23 Apr 2025 16:06:16 +0200, Danilo Krummrich wrote:
> On Sun, Apr 20, 2025 at 09:19:45PM +0900, Alexandre Courbot wrote:

[...]

> > +impl NpdeStruct {
> > +    /// Check if this is the last image in the ROM
> > +    fn is_last(&self) -> bool {
> > +        self.last_image & 0x80 != 0
> 
> What's the magic number for?

The NPDE is the NVIDIA PCI Data Extension Structure which is an extension to the
PCI Data Structure.

As per the publicly available PCI Firmware Specification v3.3, in section 5.1 it
says:

"The last image in a ROM has a special encoding in the header to identify it as
the last image."

Then when it describes the PCI data structure, it says for the Last Image
indicator byte:
"Bit 7 in this field tells whether or not this is the last image in the
ROM. A value of 1 indicates “last image;” a value of 0 indicates that
another image follows. Bits 0-6 are reserved."

I will go ahead and a LAST_ROM_IMAGE_MASK and put a comment here where we are
checking the bit, that will clarify it in the code.

thanks,

 - Joel

  parent reply	other threads:[~2025-04-26 23:17 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-20 12:19 [PATCH 00/16] nova-core: run FWSEC-FRTS to perform first stage of GSP initialization Alexandre Courbot
2025-04-20 12:19 ` [PATCH 01/16] rust: add useful ops for u64 Alexandre Courbot
2025-04-20 12:19 ` [PATCH 02/16] rust: make ETIMEDOUT error available Alexandre Courbot
2025-04-20 12:19 ` [PATCH 03/16] gpu: nova-core: derive useful traits for Chipset Alexandre Courbot
2025-04-22 16:23   ` Joel Fernandes
2025-04-24  7:50     ` Alexandre Courbot
2025-04-20 12:19 ` [PATCH 04/16] gpu: nova-core: add missing GA100 definition Alexandre Courbot
2025-04-20 12:19 ` [PATCH 05/16] gpu: nova-core: take bound device in Gpu::new Alexandre Courbot
2025-04-20 12:19 ` [PATCH 06/16] gpu: nova-core: define registers layout using helper macro Alexandre Courbot
2025-04-22 10:29   ` Danilo Krummrich
2025-04-28 14:27     ` Alexandre Courbot
2025-04-20 12:19 ` [PATCH 07/16] gpu: nova-core: move Firmware to firmware module Alexandre Courbot
2025-04-20 12:19 ` [PATCH 08/16] gpu: nova-core: wait for GFW_BOOT completion Alexandre Courbot
2025-04-21 21:45   ` Joel Fernandes
2025-04-22 11:28     ` Danilo Krummrich
2025-04-22 13:06       ` Alexandre Courbot
2025-04-22 13:46         ` Joel Fernandes
2025-04-22 11:36   ` Danilo Krummrich
2025-04-29 12:48     ` Alexandre Courbot
2025-04-30 22:45       ` Joel Fernandes
2025-04-20 12:19 ` [PATCH 09/16] gpu: nova-core: register sysmem flush page Alexandre Courbot
2025-04-22 11:45   ` Danilo Krummrich
2025-04-23 13:03     ` Alexandre Courbot
2025-04-22 18:50   ` Joel Fernandes
2025-04-20 12:19 ` [PATCH 10/16] gpu: nova-core: add basic timer device Alexandre Courbot
2025-04-22 12:07   ` Danilo Krummrich
2025-04-29 13:13     ` Alexandre Courbot
2025-04-20 12:19 ` [PATCH 11/16] gpu: nova-core: add falcon register definitions and base code Alexandre Courbot
2025-04-22 14:44   ` Danilo Krummrich
2025-04-30  6:58     ` Joel Fernandes
2025-04-30 10:32       ` Danilo Krummrich
2025-04-30 13:25     ` Alexandre Courbot
2025-04-30 14:38       ` Joel Fernandes
2025-04-30 18:16         ` Danilo Krummrich
2025-04-30 23:08           ` Joel Fernandes
2025-05-01  0:09           ` Alexandre Courbot
2025-05-01  0:22             ` Joel Fernandes
2025-05-01 14:07               ` Alexandre Courbot
2025-04-20 12:19 ` [PATCH 12/16] gpu: nova-core: firmware: add ucode descriptor used by FWSEC-FRTS Alexandre Courbot
2025-04-22 14:46   ` Danilo Krummrich
2025-04-20 12:19 ` [PATCH 13/16] gpu: nova-core: Add support for VBIOS ucode extraction for boot Alexandre Courbot
2025-04-23 14:06   ` Danilo Krummrich
2025-04-23 14:52     ` Joel Fernandes
2025-04-23 15:02       ` Danilo Krummrich
2025-04-24 19:19         ` Joel Fernandes
2025-04-24 20:01           ` Danilo Krummrich
2025-04-24 19:54         ` Joel Fernandes
2025-04-24 20:17           ` Danilo Krummrich
2025-04-25  2:32             ` [13/16] " Joel Fernandes
2025-04-25 17:10               ` Joel Fernandes
2025-04-24 18:54     ` [PATCH 13/16] " Joel Fernandes
2025-04-24 20:08       ` Danilo Krummrich
2025-04-25  2:26         ` [13/16] " Joel Fernandes
2025-04-24 20:22     ` [PATCH 13/16] " Joel Fernandes
2025-04-26 23:17     ` Joel Fernandes [this message]
2025-04-20 12:19 ` [PATCH 14/16] gpu: nova-core: compute layout of the FRTS region Alexandre Courbot
2025-04-20 12:19 ` [PATCH 15/16] gpu: nova-core: extract FWSEC from BIOS and patch it to run FWSEC-FRTS Alexandre Courbot
2025-04-20 12:19 ` [PATCH 16/16] gpu: nova-core: load and " Alexandre Courbot
2025-04-22  8:40 ` [PATCH 00/16] nova-core: run FWSEC-FRTS to perform first stage of GSP initialization Danilo Krummrich
2025-04-22 14:12   ` Alexandre Courbot

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=174570946562.876.14485782898212757811@patchwork.local \
    --to=joelagnelf@nvidia.com \
    --cc=a.hindborg@kernel.org \
    --cc=acourbot@nvidia.com \
    --cc=airlied@gmail.com \
    --cc=alex.gaynor@gmail.com \
    --cc=aliceryhl@google.com \
    --cc=apopple@nvidia.com \
    --cc=benno.lossin@proton.me \
    --cc=bjorn3_gh@protonmail.com \
    --cc=boqun.feng@gmail.com \
    --cc=bskeggs@nvidia.com \
    --cc=corbet@lwn.net \
    --cc=dakr@kernel.org \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=gary@garyguo.net \
    --cc=jhubbard@nvidia.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=maarten.lankhorst@linux.intel.com \
    --cc=mripard@kernel.org \
    --cc=nouveau@lists.freedesktop.org \
    --cc=ojeda@kernel.org \
    --cc=rust-for-linux@vger.kernel.org \
    --cc=simona@ffwll.ch \
    --cc=tmgross@umich.edu \
    --cc=ttabi@nvidia.com \
    --cc=tzimmermann@suse.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®