[PATCH v2 1/1] dt-bindings: mtd: convert lpc32xx-mlc.txt to yaml format

[PATCH v2 1/1] dt-bindings: mtd: convert lpc32xx-mlc.txt to yaml format

[Frank Li]

Convert lpc32xx-mlc.txt to yaml format.

Additional changes:
- replace _ with - in property names.
- add missed clocks to align lpc32xx.dtsi.
- allow partitions subnode.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
change in v2
- remove nand-controller.yaml.
- add clocks
- update examples to align lpc32xx.dtsi
- add partitions although no mlc users under upstream tree. It should be
similar with slc case.
---
 .../devicetree/bindings/mtd/lpc32xx-mlc.txt   | 50 -----------
 .../bindings/mtd/nxp,lpc3220-mlc.yaml         | 88 +++++++++++++++++++
 2 files changed, 88 insertions(+), 50 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/mtd/lpc32xx-mlc.txt
 create mode 100644 Documentation/devicetree/bindings/mtd/nxp,lpc3220-mlc.yaml

diff --git a/Documentation/devicetree/bindings/mtd/lpc32xx-mlc.txt b/Documentation/devicetree/bindings/mtd/lpc32xx-mlc.txt
deleted file mode 100644
index 64c06aa05ac71..0000000000000
--- a/Documentation/devicetree/bindings/mtd/lpc32xx-mlc.txt
+++ /dev/null
@@ -1,50 +0,0 @@
-NXP LPC32xx SoC NAND MLC controller
-
-Required properties:
-- compatible: "nxp,lpc3220-mlc"
-- reg: Address and size of the controller
-- interrupts: The NAND interrupt specification
-- gpios: GPIO specification for NAND write protect
-
-The following required properties are very controller specific. See the LPC32xx
-User Manual 7.5.14 MLC NAND Timing Register (the values here are specified in
-Hz, to make them independent of actual clock speed and to provide for good
-accuracy:)
-- nxp,tcea_delay: TCEA_DELAY
-- nxp,busy_delay: BUSY_DELAY
-- nxp,nand_ta: NAND_TA
-- nxp,rd_high: RD_HIGH
-- nxp,rd_low: RD_LOW
-- nxp,wr_high: WR_HIGH
-- nxp,wr_low: WR_LOW
-
-Optional subnodes:
-- Partitions, see Documentation/devicetree/bindings/mtd/mtd.yaml
-
-Example:
-
-	mlc: flash@200a8000 {
-		compatible = "nxp,lpc3220-mlc";
-		reg = <0x200A8000 0x11000>;
-		interrupts = <11 0>;
-		#address-cells = <1>;
-		#size-cells = <1>;
-
-		nxp,tcea-delay = <333333333>;
-		nxp,busy-delay = <10000000>;
-		nxp,nand-ta = <18181818>;
-		nxp,rd-high = <31250000>;
-		nxp,rd-low = <45454545>;
-		nxp,wr-high = <40000000>;
-		nxp,wr-low = <83333333>;
-		gpios = <&gpio 5 19 1>; /* GPO_P3 19, active low */
-
-		mtd0@00000000 {
-			label = "boot";
-			reg = <0x00000000 0x00064000>;
-			read-only;
-		};
-
-		...
-
-	};
diff --git a/Documentation/devicetree/bindings/mtd/nxp,lpc3220-mlc.yaml b/Documentation/devicetree/bindings/mtd/nxp,lpc3220-mlc.yaml
new file mode 100644
index 0000000000000..a3ff32a4e94be
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/nxp,lpc3220-mlc.yaml
@@ -0,0 +1,88 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/nxp,lpc3220-mlc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP LPC32xx SoC NAND MLC controller
+
+maintainers:
+  - Frank Li <Frank.Li@nxp.com>
+
+properties:
+  compatible:
+    const: nxp,lpc3220-mlc
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  gpios:
+    maxItems: 1
+    description: GPIO specification for NAND write protect
+
+  partitions:
+    type: object
+    $ref: partitions/partitions.yaml
+    unevaluatedProperties: false
+
+  nxp,tcea-delay:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: TCEA_DELAY in Hz
+
+  nxp,busy-delay:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: BUSY_DELAY in Hz
+
+  nxp,nand-ta:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: NAND_TA in Hz
+
+  nxp,rd-high:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: RD_HIGH in Hz
+
+  nxp,rd-low:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: RD_LOW in Hz
+
+  nxp,wr-high:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: WR_HIGH in Hz
+
+  nxp,wr-low:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: WR_LOW in Hz
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - gpios
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/irq.h>
+    #include <dt-bindings/clock/lpc32xx-clock.h>
+
+    nand-controller@200a8000 {
+        compatible = "nxp,lpc3220-mlc";
+        reg = <0x200A8000 0x11000>;
+        interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&clk LPC32XX_CLK_MLC>;
+        nxp,tcea-delay = <333333333>;
+        nxp,busy-delay = <10000000>;
+        nxp,nand-ta = <18181818>;
+        nxp,rd-high = <31250000>;
+        nxp,rd-low = <45454545>;
+        nxp,wr-high = <40000000>;
+        nxp,wr-low = <83333333>;
+        gpios = <&gpio 5 19 1>; /* GPO_P3 19, active low */
+    };
-- 
2.34.1

Re: [PATCH v2 1/1] dt-bindings: mtd: convert lpc32xx-mlc.txt to yaml format

[Rob Herring (Arm)]

On Tue, 01 Jul 2025 17:25:24 -0400, Frank Li wrote:
> Convert lpc32xx-mlc.txt to yaml format.
> 
> Additional changes:
> - replace _ with - in property names.
> - add missed clocks to align lpc32xx.dtsi.
> - allow partitions subnode.
> 
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
> ---
> change in v2
> - remove nand-controller.yaml.
> - add clocks
> - update examples to align lpc32xx.dtsi
> - add partitions although no mlc users under upstream tree. It should be
> similar with slc case.
> ---
>  .../devicetree/bindings/mtd/lpc32xx-mlc.txt   | 50 -----------
>  .../bindings/mtd/nxp,lpc3220-mlc.yaml         | 88 +++++++++++++++++++
>  2 files changed, 88 insertions(+), 50 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/mtd/lpc32xx-mlc.txt
>  create mode 100644 Documentation/devicetree/bindings/mtd/nxp,lpc3220-mlc.yaml
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/mtd/nxp,lpc3220-mlc.example.dtb: nand-controller@200a8000 (nxp,lpc3220-mlc): '#address-cells' is a required property
	from schema $id: http://devicetree.org/schemas/mtd/nand-controller.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/mtd/nxp,lpc3220-mlc.example.dtb: nand-controller@200a8000 (nxp,lpc3220-mlc): '#size-cells' is a required property
	from schema $id: http://devicetree.org/schemas/mtd/nand-controller.yaml#

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250701212525.3106709-1-Frank.Li@nxp.com

The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.