From: "Rob Herring (Arm)" <robh@kernel.org>
To: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Cc: Haiyang Zhang <haiyangz@microsoft.com>,
Yunhong Jiang <yunhong.jiang@linux.intel.com>,
Conor Dooley <conor+dt@kernel.org>,
"K. Y. Srinivasan" <kys@microsoft.com>,
Wei Liu <wei.liu@kernel.org>, Dexuan Cui <decui@microsoft.com>,
Chris Oo <cho@microsoft.com>,
"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
Michael Kelley <mhklinux@outlook.com>,
Ricardo Neri <ricardo.neri@intel.com>,
Saurabh Sengar <ssengar@linux.microsoft.com>,
devicetree@vger.kernel.org, linux-acpi@vger.kernel.org,
linux-kernel@vger.kernel.org,
"Rafael J. Wysocki" <rafael@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
linux-hyperv@vger.kernel.org, x86@kernel.org
Subject: Re: [PATCH v5 03/10] dt-bindings: reserved-memory: Wakeup Mailbox for Intel processors
Date: Tue, 8 Jul 2025 07:41:33 -0500 [thread overview]
Message-ID: <175197849289.389672.9119321529069936382.robh@kernel.org> (raw)
In-Reply-To: <20250627-rneri-wakeup-mailbox-v5-3-df547b1d196e@linux.intel.com>
On Fri, 27 Jun 2025 20:35:09 -0700, Ricardo Neri wrote:
> Add DeviceTree bindings to enumerate the wakeup mailbox used in platform
> firmware for Intel processors.
>
> x86 platforms commonly boot secondary CPUs using an INIT assert, de-assert
> followed by Start-Up IPI messages. The wakeup mailbox can be used when this
> mechanism is unavailable.
>
> The wakeup mailbox offers more control to the operating system to boot
> secondary CPUs than a spin-table. It allows the reuse of same wakeup vector
> for all CPUs while maintaining control over which CPUs to boot and when.
> While it is possible to achieve the same level of control using a spin-
> table, it would require to specify a separate `cpu-release-addr` for each
> secondary CPU.
>
> The operation and structure of the mailbox is described in the
> Multiprocessor Wakeup Structure defined in the ACPI specification. Note
> that this structure does not specify how to publish the mailbox to the
> operating system (ACPI-based platform firmware uses a separate table). No
> ACPI table is needed in DeviceTree-based firmware to enumerate the mailbox.
>
> Add a `compatible` property that the operating system can use to discover
> the mailbox. Nodes wanting to refer to the reserved memory usually define a
> `memory-region` property. /cpus/cpu* nodes would want to refer to the
> mailbox, but they do not have such property defined in the DeviceTree
> specification. Moreover, it would imply that there is a memory region per
> CPU.
>
> Co-developed-by: Yunhong Jiang <yunhong.jiang@linux.intel.com>
> Signed-off-by: Yunhong Jiang <yunhong.jiang@linux.intel.com>
> Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
> ---
> Changes since v4:
> - Specified the version and section of the ACPI spec in which the
> wakeup mailbox is defined. (Rafael)
> - Fixed a warning from yamllint about line lengths of URLs.
>
> Changes since v3:
> - Removed redefinitions of the mailbox and instead referred to ACPI
> specification as per discussion on LKML.
> - Clarified that DeviceTree-based firmware do not require the use of
> ACPI tables to enumerate the mailbox. (Rob)
> - Described the need of using a `compatible` property.
> - Dropped the `alignment` property. (Krzysztof, Rafael)
> - Used a real address for the mailbox node. (Krzysztof)
>
> Changes since v2:
> - Implemented the mailbox as a reserved-memory node. Add to it a
> `compatible` property. (Krzysztof)
> - Explained the relationship between the mailbox and the `enable-mehod`
> property of the CPU nodes.
> - Expanded the documentation of the binding.
>
> Changes since v1:
> - Added more details to the description of the binding.
> - Added requirement a new requirement for cpu@N nodes to add an
> `enable-method`.
> ---
> .../reserved-memory/intel,wakeup-mailbox.yaml | 50 ++++++++++++++++++++++
> 1 file changed, 50 insertions(+)
>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
next prev parent reply other threads:[~2025-07-08 12:41 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-28 3:35 [PATCH v5 00/10] x86/hyperv/hv_vtl: Use a wakeup mailbox to boot secondary CPUs Ricardo Neri
2025-06-28 3:35 ` [PATCH v5 01/10] x86/acpi: Add a helper functions to setup and access the wakeup mailbox Ricardo Neri
2025-06-30 18:55 ` Rafael J. Wysocki
2025-06-30 22:51 ` Ricardo Neri
2025-09-12 16:43 ` [EXTERNAL] " Dexuan Cui
2025-06-28 3:35 ` [PATCH v5 02/10] x86/acpi: Move acpi_wakeup_cpu() and helpers to smpwakeup.c Ricardo Neri
2025-06-30 11:03 ` Peter Zijlstra
2025-06-30 12:07 ` Kirill A. Shutemov
2025-06-30 13:26 ` Peter Zijlstra
2025-06-30 18:58 ` Rafael J. Wysocki
2025-06-30 22:50 ` Ricardo Neri
2025-09-12 16:49 ` [EXTERNAL] " Dexuan Cui
2025-06-28 3:35 ` [PATCH v5 03/10] dt-bindings: reserved-memory: Wakeup Mailbox for Intel processors Ricardo Neri
2025-06-30 19:02 ` Rafael J. Wysocki
2025-06-30 22:49 ` Ricardo Neri
2025-07-08 12:41 ` Rob Herring (Arm) [this message]
2025-09-12 20:39 ` [EXTERNAL] " Dexuan Cui
2025-06-28 3:35 ` [PATCH v5 04/10] x86/dt: Parse the " Ricardo Neri
2025-09-12 20:41 ` [EXTERNAL] " Dexuan Cui
2025-06-28 3:35 ` [PATCH v5 05/10] x86/hyperv/vtl: Set real_mode_header in hv_vtl_init_platform() Ricardo Neri
2025-09-12 20:43 ` [EXTERNAL] " Dexuan Cui
2025-09-19 2:46 ` Ricardo Neri
2025-06-28 3:35 ` [PATCH v5 06/10] x86/realmode: Make the location of the trampoline configurable Ricardo Neri
2025-09-12 20:45 ` [EXTERNAL] " Dexuan Cui
2025-09-30 21:08 ` Wei Liu
2025-06-28 3:35 ` [PATCH v5 07/10] x86/hyperv/vtl: Setup the 64-bit trampoline for TDX guests Ricardo Neri
2025-09-12 20:45 ` [EXTERNAL] " Dexuan Cui
2025-06-28 3:35 ` [PATCH v5 08/10] x86/smpwakeup: Add a helper get the address of the wakeup mailbox Ricardo Neri
2025-09-12 20:46 ` [EXTERNAL] " Dexuan Cui
2025-06-28 3:35 ` [PATCH v5 09/10] x86/hyperv/vtl: Mark the wakeup mailbox page as private Ricardo Neri
2025-09-12 20:47 ` [EXTERNAL] " Dexuan Cui
2025-06-28 3:35 ` [PATCH v5 10/10] x86/hyperv/vtl: Use the wakeup mailbox to boot secondary CPUs Ricardo Neri
2025-09-12 20:47 ` [EXTERNAL] " Dexuan Cui
2025-09-19 2:47 ` Ricardo Neri
2025-08-20 23:11 ` [PATCH v5 00/10] x86/hyperv/hv_vtl: Use a " Ricardo Neri
2025-09-19 2:59 ` Ricardo Neri
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