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From: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
To: "Rafael J. Wysocki" <rafael@kernel.org>
Cc: x86@kernel.org, Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>, Rob Herring <robh@kernel.org>,
	"K. Y. Srinivasan" <kys@microsoft.com>,
	Haiyang Zhang <haiyangz@microsoft.com>,
	Wei Liu <wei.liu@kernel.org>, Dexuan Cui <decui@microsoft.com>,
	Michael Kelley <mhklinux@outlook.com>,
	Saurabh Sengar <ssengar@linux.microsoft.com>,
	Chris Oo <cho@microsoft.com>,
	"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
	linux-hyperv@vger.kernel.org, devicetree@vger.kernel.org,
	linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org,
	Ricardo Neri <ricardo.neri@intel.com>,
	Yunhong Jiang <yunhong.jiang@linux.intel.com>
Subject: Re: [PATCH v5 03/10] dt-bindings: reserved-memory: Wakeup Mailbox for Intel processors
Date: Mon, 30 Jun 2025 15:49:47 -0700	[thread overview]
Message-ID: <20250630224947.GA3072@ranerica-svr.sc.intel.com> (raw)
In-Reply-To: <CAJZ5v0h_oifyhJq4WiOzS0fcexrjeChJhVyAthfQCX=6v_GumA@mail.gmail.com>

On Mon, Jun 30, 2025 at 09:02:00PM +0200, Rafael J. Wysocki wrote:
> On Sat, Jun 28, 2025 at 5:35 AM Ricardo Neri
> <ricardo.neri-calderon@linux.intel.com> wrote:
> >
> > Add DeviceTree bindings to enumerate the wakeup mailbox used in platform
> > firmware for Intel processors.
> >
> > x86 platforms commonly boot secondary CPUs using an INIT assert, de-assert
> > followed by Start-Up IPI messages. The wakeup mailbox can be used when this
> > mechanism is unavailable.
> >
> > The wakeup mailbox offers more control to the operating system to boot
> > secondary CPUs than a spin-table. It allows the reuse of same wakeup vector
> > for all CPUs while maintaining control over which CPUs to boot and when.
> > While it is possible to achieve the same level of control using a spin-
> > table, it would require to specify a separate `cpu-release-addr` for each
> > secondary CPU.
> >
> > The operation and structure of the mailbox is described in the
> > Multiprocessor Wakeup Structure defined in the ACPI specification. Note
> > that this structure does not specify how to publish the mailbox to the
> > operating system (ACPI-based platform firmware uses a separate table). No
> > ACPI table is needed in DeviceTree-based firmware to enumerate the mailbox.
> >
> > Add a `compatible` property that the operating system can use to discover
> > the mailbox. Nodes wanting to refer to the reserved memory usually define a
> > `memory-region` property. /cpus/cpu* nodes would want to refer to the
> > mailbox, but they do not have such property defined in the DeviceTree
> > specification. Moreover, it would imply that there is a memory region per
> > CPU.
> >
> > Co-developed-by: Yunhong Jiang <yunhong.jiang@linux.intel.com>
> > Signed-off-by: Yunhong Jiang <yunhong.jiang@linux.intel.com>
> > Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
> 
> LGTM from the ACPI specification cross-referencing perspective, so
> 
> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

Thank you Rafael!

I hope this looks good to Krzysztof and Rob too.

  reply	other threads:[~2025-06-30 22:43 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-28  3:35 [PATCH v5 00/10] x86/hyperv/hv_vtl: Use a wakeup mailbox to boot secondary CPUs Ricardo Neri
2025-06-28  3:35 ` [PATCH v5 01/10] x86/acpi: Add a helper functions to setup and access the wakeup mailbox Ricardo Neri
2025-06-30 18:55   ` Rafael J. Wysocki
2025-06-30 22:51     ` Ricardo Neri
2025-09-12 16:43   ` [EXTERNAL] " Dexuan Cui
2025-06-28  3:35 ` [PATCH v5 02/10] x86/acpi: Move acpi_wakeup_cpu() and helpers to smpwakeup.c Ricardo Neri
2025-06-30 11:03   ` Peter Zijlstra
2025-06-30 12:07     ` Kirill A. Shutemov
2025-06-30 13:26       ` Peter Zijlstra
2025-06-30 18:58   ` Rafael J. Wysocki
2025-06-30 22:50     ` Ricardo Neri
2025-09-12 16:49   ` [EXTERNAL] " Dexuan Cui
2025-06-28  3:35 ` [PATCH v5 03/10] dt-bindings: reserved-memory: Wakeup Mailbox for Intel processors Ricardo Neri
2025-06-30 19:02   ` Rafael J. Wysocki
2025-06-30 22:49     ` Ricardo Neri [this message]
2025-07-08 12:41   ` Rob Herring (Arm)
2025-09-12 20:39   ` [EXTERNAL] " Dexuan Cui
2025-06-28  3:35 ` [PATCH v5 04/10] x86/dt: Parse the " Ricardo Neri
2025-09-12 20:41   ` [EXTERNAL] " Dexuan Cui
2025-06-28  3:35 ` [PATCH v5 05/10] x86/hyperv/vtl: Set real_mode_header in hv_vtl_init_platform() Ricardo Neri
2025-09-12 20:43   ` [EXTERNAL] " Dexuan Cui
2025-09-19  2:46     ` Ricardo Neri
2025-06-28  3:35 ` [PATCH v5 06/10] x86/realmode: Make the location of the trampoline configurable Ricardo Neri
2025-09-12 20:45   ` [EXTERNAL] " Dexuan Cui
2025-09-30 21:08   ` Wei Liu
2025-06-28  3:35 ` [PATCH v5 07/10] x86/hyperv/vtl: Setup the 64-bit trampoline for TDX guests Ricardo Neri
2025-09-12 20:45   ` [EXTERNAL] " Dexuan Cui
2025-06-28  3:35 ` [PATCH v5 08/10] x86/smpwakeup: Add a helper get the address of the wakeup mailbox Ricardo Neri
2025-09-12 20:46   ` [EXTERNAL] " Dexuan Cui
2025-06-28  3:35 ` [PATCH v5 09/10] x86/hyperv/vtl: Mark the wakeup mailbox page as private Ricardo Neri
2025-09-12 20:47   ` [EXTERNAL] " Dexuan Cui
2025-06-28  3:35 ` [PATCH v5 10/10] x86/hyperv/vtl: Use the wakeup mailbox to boot secondary CPUs Ricardo Neri
2025-09-12 20:47   ` [EXTERNAL] " Dexuan Cui
2025-09-19  2:47     ` Ricardo Neri
2025-08-20 23:11 ` [PATCH v5 00/10] x86/hyperv/hv_vtl: Use a " Ricardo Neri
2025-09-19  2:59   ` Ricardo Neri

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