mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
* [PATCH -next] riscv: Enable ARCH_HAVE_NMI_SAFE_CMPXCHG
@ 2025-07-11  9:04 Pu Lehui
  2025-07-17  2:00 ` Pu Lehui
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: Pu Lehui @ 2025-07-11  9:04 UTC (permalink / raw)
  To: linux-riscv, linux-kernel; +Cc: Palmer Dabbelt, Alexandre Ghiti, Pu Lehui

From: Pu Lehui <pulehui@huawei.com>

The implement of cmpxchg() in riscv is based on atomic primitives and
has NMI-safe features, so it can be used safely in the in_nmi context.
ftrace's ringbuffer relies on NMI-safe cmpxchg() in the NMI context.
Currently, in_nmi() is true when riscv kprobe is in trap-based mode, so
this config needs to be selected, otherwise kprobetrace will not be
available.

Signed-off-by: Pu Lehui <pulehui@huawei.com>
---
 arch/riscv/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 36061f4732b7..0e2dfa98338a 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -23,6 +23,7 @@ config RISCV
 	select ARCH_ENABLE_MEMORY_HOTREMOVE if MEMORY_HOTPLUG
 	select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2
 	select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE
+	select ARCH_HAVE_NMI_SAFE_CMPXCHG
 	select ARCH_HAS_BINFMT_FLAT
 	select ARCH_HAS_CRC32 if RISCV_ISA_ZBC
 	select ARCH_HAS_CRC64 if 64BIT && RISCV_ISA_ZBC
-- 
2.34.1


^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2025-08-06 17:15 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2025-07-11  9:04 [PATCH -next] riscv: Enable ARCH_HAVE_NMI_SAFE_CMPXCHG Pu Lehui
2025-07-17  2:00 ` Pu Lehui
2025-07-17  7:38 ` Alexandre Ghiti
2025-08-06 17:15 ` patchwork-bot+linux-riscv

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®