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From: "Rob Herring (Arm)" <robh@kernel.org>
To: hans.zhang@cixtech.com
Cc: lpieralisi@kernel.org, kw@linux.com, guoyin.chen@cixtech.com,
	 krzk+dt@kernel.org, cix-kernel-upstream@cixtech.com,
	conor+dt@kernel.org,  mani@kernel.org, linux-pci@vger.kernel.org,
	peter.chen@cixtech.com,  devicetree@vger.kernel.org,
	mpillai@cadence.com,  linux-kernel@vger.kernel.org,
	kwilczynski@kernel.org, bhelgaas@google.com,
	 fugang.duan@cixtech.com
Subject: Re: [PATCH v6 07/12] dt-bindings: PCI: Add CIX Sky1 PCIe Root Complex bindings
Date: Fri, 08 Aug 2025 08:28:59 -0500	[thread overview]
Message-ID: <175465973854.5889.2255011303498628193.robh@kernel.org> (raw)
In-Reply-To: <20250808072929.4090694-8-hans.zhang@cixtech.com>


On Fri, 08 Aug 2025 15:29:24 +0800, hans.zhang@cixtech.com wrote:
> From: Hans Zhang <hans.zhang@cixtech.com>
> 
> Document the bindings for CIX Sky1 PCIe Controller configured in
> root complex mode with five root port.
> 
> Supports 4 INTx, MSI and MSI-x interrupts from the ARM GICv3 controller.
> 
> Signed-off-by: Hans Zhang <hans.zhang@cixtech.com>
> ---
>  .../bindings/pci/cix,sky1-pcie-host.yaml      | 73 +++++++++++++++++++
>  1 file changed, 73 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml: properties:compatible:oneOf: [{'const': 'cix,sky1-pcie-host'}] should not be valid under {'items': {'propertyNames': {'const': 'const'}, 'required': ['const']}}
	hint: Use 'enum' rather than 'oneOf' + 'const' entries
	from schema $id: http://devicetree.org/meta-schemas/keywords.yaml#
Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.example.dts:27.13-29.83: Warning (ranges_format): /example-0/pcie@a010000:ranges: "ranges" property has invalid length (84 bytes) (parent #address-cells == 1, child #address-cells == 3, #size-cells == 2)
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.example.dtb: pcie@a010000 (cix,sky1-pcie-host): ranges: 'oneOf' conditional failed, one must be fixed:
	[[16777216, 0, 1611661312, 0, 1611661312, 0], [1048576, 33554432, 0, 1612709888, 0, 1612709888], [0, 534773760, 1124073472, 24, 0, 24], [0, 4, 0]] is not of type 'boolean'
	1048576 is not one of [16777216, 33554432, 50331648, 1107296256, 1124073472, 2164260864, 2181038080, 2197815296, 3254779904, 3271557120]
	0 is not one of [16777216, 33554432, 50331648, 1107296256, 1124073472, 2164260864, 2181038080, 2197815296, 3254779904, 3271557120]
	[0, 4, 0] is too short
	from schema $id: http://devicetree.org/schemas/pci/cix,sky1-pcie-host.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.example.dtb: pcie@a010000 (cix,sky1-pcie-host): reg: [[0, 167837696], [0, 65536], [0, 738197504], [0, 67108864], [0, 167772160], [0, 65536], [0, 1610612736], [0, 1048576]] is too long
	from schema $id: http://devicetree.org/schemas/pci/cix,sky1-pcie-host.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.example.dtb: pcie@a010000 (cix,sky1-pcie-host): Unevaluated properties are not allowed ('#address-cells', '#interrupt-cells', '#size-cells', 'bus-range', 'device_type', 'interrupt-map', 'interrupt-map-mask', 'msi-map', 'ranges', 'reg' were unexpected)
	from schema $id: http://devicetree.org/schemas/pci/cix,sky1-pcie-host.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.example.dtb: pcie@a010000 (cix,sky1-pcie-host): ranges: 'oneOf' conditional failed, one must be fixed:
	[[16777216, 0, 1611661312, 0, 1611661312, 0], [1048576, 33554432, 0, 1612709888, 0, 1612709888], [0, 534773760, 1124073472, 24, 0, 24], [0, 4, 0]] is not of type 'boolean'
	1048576 is not one of [16777216, 33554432, 50331648, 1107296256, 1124073472, 2164260864, 2181038080, 2197815296, 3254779904, 3271557120]
	0 is not one of [16777216, 33554432, 50331648, 1107296256, 1124073472, 2164260864, 2181038080, 2197815296, 3254779904, 3271557120]
	[0, 4, 0] is too short
	from schema $id: http://devicetree.org/schemas/pci/pci-bus-common.yaml#

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250808072929.4090694-8-hans.zhang@cixtech.com

The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.


  reply	other threads:[~2025-08-08 13:29 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-08  7:29 [PATCH v6 00/12] Enhance the PCIe controller driver for next generation controllers hans.zhang
2025-08-08  7:29 ` [PATCH v6 01/12] PCI: cadence: Split PCIe controller header file hans.zhang
2025-08-08  7:29 ` [PATCH v6 02/12] PCI: cadence: Add register definitions for HPA(High Perf Architecture) hans.zhang
2025-08-08  7:29 ` [PATCH v6 03/12] PCI: cadence: Split PCIe EP support into common and specific functions hans.zhang
2025-08-08  7:29 ` [PATCH v6 04/12] PCI: cadence: Split PCIe RP " hans.zhang
2025-08-08 23:35   ` kernel test robot
2025-08-12  4:02     ` Manikandan Karunakaran Pillai
2025-08-08  7:29 ` [PATCH v6 05/12] PCI: cadence: Split the common functions for PCIe controller support hans.zhang
2025-08-08  7:29 ` [PATCH v6 06/12] PCI: cadence: Add support for High Performance Arch(HPA) controller hans.zhang
2025-08-08 19:57   ` kernel test robot
2025-08-12  4:00     ` Manikandan Karunakaran Pillai
2025-08-09  1:59   ` kernel test robot
2025-08-08  7:29 ` [PATCH v6 07/12] dt-bindings: PCI: Add CIX Sky1 PCIe Root Complex bindings hans.zhang
2025-08-08 13:28   ` Rob Herring (Arm) [this message]
2025-08-08 15:17     ` Hans Zhang
2025-08-08  7:29 ` [PATCH v6 08/12] PCI: Add Cix Technology Vendor and Device ID hans.zhang
2025-08-08  7:29 ` [PATCH v6 09/12] PCI: sky1: Add PCIe host support for CIX Sky1 hans.zhang
2025-08-09  1:17   ` kernel test robot
2025-08-08  7:29 ` [PATCH v6 10/12] MAINTAINERS: add entry for CIX Sky1 PCIe driver hans.zhang
2025-08-08  7:29 ` [PATCH v6 11/12] arm64: dts: cix: Add PCIe Root Complex on sky1 hans.zhang
2025-08-08  7:29 ` [PATCH v6 12/12] arm64: dts: cix: Enable PCIe on the Orion O6 board hans.zhang

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