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From: hans.zhang@cixtech.com
To: bhelgaas@google.com, lpieralisi@kernel.org, kw@linux.com,
	mani@kernel.org, robh@kernel.org, kwilczynski@kernel.org,
	krzk+dt@kernel.org, conor+dt@kernel.org
Cc: mpillai@cadence.com, fugang.duan@cixtech.com,
	guoyin.chen@cixtech.com, peter.chen@cixtech.com,
	cix-kernel-upstream@cixtech.com, linux-pci@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	Hans Zhang <hans.zhang@cixtech.com>
Subject: [PATCH v6 12/12] arm64: dts: cix: Enable PCIe on the Orion O6 board
Date: Fri,  8 Aug 2025 15:29:29 +0800	[thread overview]
Message-ID: <20250808072929.4090694-13-hans.zhang@cixtech.com> (raw)
In-Reply-To: <20250808072929.4090694-1-hans.zhang@cixtech.com>

From: Hans Zhang <hans.zhang@cixtech.com>

Add PCIe RC support on Orion O6 board.

Signed-off-by: Hans Zhang <hans.zhang@cixtech.com>
---
Dear Krzysztof,

Due to the fact that the GPIO, PINCTRL and other modules of our platform are
not yet ready for upstream. Attributes that PCIe depends on, such as reset-gpios
and pinctrl*, have not been added for the time being. It will be added gradually
in the future.

The following are Arnd's previous comments. We can go to upsteam separately.
https://lore.kernel.org/all/422deb4d-db29-48c1-b0c9-7915951df500@app.fastmail.com/
---
 arch/arm64/boot/dts/cix/sky1-orion-o6.dts | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm64/boot/dts/cix/sky1-orion-o6.dts b/arch/arm64/boot/dts/cix/sky1-orion-o6.dts
index d74964d53c3b..be3ec4f5d11e 100644
--- a/arch/arm64/boot/dts/cix/sky1-orion-o6.dts
+++ b/arch/arm64/boot/dts/cix/sky1-orion-o6.dts
@@ -34,6 +34,26 @@ linux,cma {
 
 };
 
+&pcie_x8_rc {
+	status = "okay";
+};
+
+&pcie_x4_rc {
+	status = "okay";
+};
+
+&pcie_x2_rc {
+	status = "okay";
+};
+
+&pcie_x1_0_rc {
+	status = "okay";
+};
+
+&pcie_x1_1_rc {
+	status = "okay";
+};
+
 &uart2 {
 	status = "okay";
 };
-- 
2.49.0


      parent reply	other threads:[~2025-08-08  7:29 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-08  7:29 [PATCH v6 00/12] Enhance the PCIe controller driver for next generation controllers hans.zhang
2025-08-08  7:29 ` [PATCH v6 01/12] PCI: cadence: Split PCIe controller header file hans.zhang
2025-08-08  7:29 ` [PATCH v6 02/12] PCI: cadence: Add register definitions for HPA(High Perf Architecture) hans.zhang
2025-08-08  7:29 ` [PATCH v6 03/12] PCI: cadence: Split PCIe EP support into common and specific functions hans.zhang
2025-08-08  7:29 ` [PATCH v6 04/12] PCI: cadence: Split PCIe RP " hans.zhang
2025-08-08 23:35   ` kernel test robot
2025-08-12  4:02     ` Manikandan Karunakaran Pillai
2025-08-08  7:29 ` [PATCH v6 05/12] PCI: cadence: Split the common functions for PCIe controller support hans.zhang
2025-08-08  7:29 ` [PATCH v6 06/12] PCI: cadence: Add support for High Performance Arch(HPA) controller hans.zhang
2025-08-08 19:57   ` kernel test robot
2025-08-12  4:00     ` Manikandan Karunakaran Pillai
2025-08-09  1:59   ` kernel test robot
2025-08-08  7:29 ` [PATCH v6 07/12] dt-bindings: PCI: Add CIX Sky1 PCIe Root Complex bindings hans.zhang
2025-08-08 13:28   ` Rob Herring (Arm)
2025-08-08 15:17     ` Hans Zhang
2025-08-08  7:29 ` [PATCH v6 08/12] PCI: Add Cix Technology Vendor and Device ID hans.zhang
2025-08-08  7:29 ` [PATCH v6 09/12] PCI: sky1: Add PCIe host support for CIX Sky1 hans.zhang
2025-08-09  1:17   ` kernel test robot
2025-08-08  7:29 ` [PATCH v6 10/12] MAINTAINERS: add entry for CIX Sky1 PCIe driver hans.zhang
2025-08-08  7:29 ` [PATCH v6 11/12] arm64: dts: cix: Add PCIe Root Complex on sky1 hans.zhang
2025-08-08  7:29 ` hans.zhang [this message]

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