* [PATCH net v3 1/3] net: stmmac: xgmac: Do not enable RX FIFO Overflow interrupts
2025-08-25 4:36 [PATCH net v3 0/3] net: stmmac: xgmac: Minor fixes Rohan G Thomas via B4 Relay
@ 2025-08-25 4:36 ` Rohan G Thomas via B4 Relay
2025-08-25 4:36 ` [PATCH net v3 2/3] net: stmmac: xgmac: Correct supported speed modes Rohan G Thomas via B4 Relay
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Rohan G Thomas via B4 Relay @ 2025-08-25 4:36 UTC (permalink / raw)
To: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni, Maxime Coquelin, Alexandre Torgue, Jose Abreu,
Romain Gantois, Serge Semin, Ong Boon Leong
Cc: netdev, linux-stm32, linux-arm-kernel, linux-kernel,
Rohan G Thomas, Matthew Gerlach, Andrew Lunn
From: Rohan G Thomas <rohan.g.thomas@altera.com>
Enabling RX FIFO Overflow interrupts is counterproductive
and causes an interrupt storm when RX FIFO overflows.
Disabling this interrupt has no side effect and eliminates
interrupt storms when the RX FIFO overflows.
Commit 8a7cb245cf28 ("net: stmmac: Do not enable RX FIFO
overflow interrupts") disables RX FIFO overflow interrupts
for DWMAC4 IP and removes the corresponding handling of
this interrupt. This patch is doing the same thing for
XGMAC IP.
Fixes: 2142754f8b9c ("net: stmmac: Add MAC related callbacks for XGMAC2")
Signed-off-by: Rohan G Thomas <rohan.g.thomas@altera.com>
Reviewed-by: Matthew Gerlach <matthew.gerlach@altera.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
---
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
index 5dcc95bc0ad28b756accf9670c5fa00aa94fcfe3..7201a38842651a865493fce0cefe757d6ae9bafa 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
@@ -203,10 +203,6 @@ static void dwxgmac2_dma_rx_mode(struct stmmac_priv *priv, void __iomem *ioaddr,
}
writel(value, ioaddr + XGMAC_MTL_RXQ_OPMODE(channel));
-
- /* Enable MTL RX overflow */
- value = readl(ioaddr + XGMAC_MTL_QINTEN(channel));
- writel(value | XGMAC_RXOIE, ioaddr + XGMAC_MTL_QINTEN(channel));
}
static void dwxgmac2_dma_tx_mode(struct stmmac_priv *priv, void __iomem *ioaddr,
--
2.25.1
^ permalink raw reply [flat|nested] 5+ messages in thread* [PATCH net v3 2/3] net: stmmac: xgmac: Correct supported speed modes
2025-08-25 4:36 [PATCH net v3 0/3] net: stmmac: xgmac: Minor fixes Rohan G Thomas via B4 Relay
2025-08-25 4:36 ` [PATCH net v3 1/3] net: stmmac: xgmac: Do not enable RX FIFO Overflow interrupts Rohan G Thomas via B4 Relay
@ 2025-08-25 4:36 ` Rohan G Thomas via B4 Relay
2025-08-25 4:36 ` [PATCH net v3 3/3] net: stmmac: Set CIC bit only for TX queues with COE Rohan G Thomas via B4 Relay
2025-08-27 1:20 ` [PATCH net v3 0/3] net: stmmac: xgmac: Minor fixes patchwork-bot+netdevbpf
3 siblings, 0 replies; 5+ messages in thread
From: Rohan G Thomas via B4 Relay @ 2025-08-25 4:36 UTC (permalink / raw)
To: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni, Maxime Coquelin, Alexandre Torgue, Jose Abreu,
Romain Gantois, Serge Semin, Ong Boon Leong
Cc: netdev, linux-stm32, linux-arm-kernel, linux-kernel,
Rohan G Thomas, Matthew Gerlach
From: Rohan G Thomas <rohan.g.thomas@altera.com>
Correct supported speed modes as per the XGMAC databook.
Commit 9cb54af214a7 ("net: stmmac: Fix IP-cores specific
MAC capabilities") removes support for 10M, 100M and
1000HD. 1000HD is not supported by XGMAC IP, but it does
support 10M and 100M FD mode for XGMAC version >= 2_20,
and it also supports 10M and 100M HD mode if the HDSEL bit
is set in the MAC_HW_FEATURE0 reg. This commit enables support
for 10M and 100M speed modes for XGMAC IP based on XGMAC
version and MAC capabilities.
Fixes: 9cb54af214a7 ("net: stmmac: Fix IP-cores specific MAC capabilities")
Signed-off-by: Rohan G Thomas <rohan.g.thomas@altera.com>
Reviewed-by: Matthew Gerlach <matthew.gerlach@altera.com>
---
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c | 13 +++++++++++--
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c | 5 +++++
2 files changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
index 6cadf8de4fdfdb18af1a112b883b3d33a53da638..00e929bf280baec7aa8d2a75fc5ceea4a52c9979 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
@@ -49,6 +49,14 @@ static void dwxgmac2_core_init(struct mac_device_info *hw,
writel(XGMAC_INT_DEFAULT_EN, ioaddr + XGMAC_INT_EN);
}
+static void dwxgmac2_update_caps(struct stmmac_priv *priv)
+{
+ if (!priv->dma_cap.mbps_10_100)
+ priv->hw->link.caps &= ~(MAC_10 | MAC_100);
+ else if (!priv->dma_cap.half_duplex)
+ priv->hw->link.caps &= ~(MAC_10HD | MAC_100HD);
+}
+
static void dwxgmac2_set_mac(void __iomem *ioaddr, bool enable)
{
u32 tx = readl(ioaddr + XGMAC_TX_CONFIG);
@@ -1424,6 +1432,7 @@ static void dwxgmac2_set_arp_offload(struct mac_device_info *hw, bool en,
const struct stmmac_ops dwxgmac210_ops = {
.core_init = dwxgmac2_core_init,
+ .update_caps = dwxgmac2_update_caps,
.set_mac = dwxgmac2_set_mac,
.rx_ipc = dwxgmac2_rx_ipc,
.rx_queue_enable = dwxgmac2_rx_queue_enable,
@@ -1532,8 +1541,8 @@ int dwxgmac2_setup(struct stmmac_priv *priv)
mac->mcast_bits_log2 = ilog2(mac->multicast_filter_bins);
mac->link.caps = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
- MAC_1000FD | MAC_2500FD | MAC_5000FD |
- MAC_10000FD;
+ MAC_10 | MAC_100 | MAC_1000FD |
+ MAC_2500FD | MAC_5000FD | MAC_10000FD;
mac->link.duplex = 0;
mac->link.speed10 = XGMAC_CONFIG_SS_10_MII;
mac->link.speed100 = XGMAC_CONFIG_SS_100_MII;
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
index 7201a38842651a865493fce0cefe757d6ae9bafa..4d6bb995d8d84cd31b8c552036a647281de06fbb 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
@@ -382,8 +382,11 @@ static int dwxgmac2_dma_interrupt(struct stmmac_priv *priv,
static int dwxgmac2_get_hw_feature(void __iomem *ioaddr,
struct dma_features *dma_cap)
{
+ struct stmmac_priv *priv;
u32 hw_cap;
+ priv = container_of(dma_cap, struct stmmac_priv, dma_cap);
+
/* MAC HW feature 0 */
hw_cap = readl(ioaddr + XGMAC_HW_FEATURE0);
dma_cap->edma = (hw_cap & XGMAC_HWFEAT_EDMA) >> 31;
@@ -406,6 +409,8 @@ static int dwxgmac2_get_hw_feature(void __iomem *ioaddr,
dma_cap->vlhash = (hw_cap & XGMAC_HWFEAT_VLHASH) >> 4;
dma_cap->half_duplex = (hw_cap & XGMAC_HWFEAT_HDSEL) >> 3;
dma_cap->mbps_1000 = (hw_cap & XGMAC_HWFEAT_GMIISEL) >> 1;
+ if (dma_cap->mbps_1000 && priv->synopsys_id >= DWXGMAC_CORE_2_20)
+ dma_cap->mbps_10_100 = 1;
/* MAC HW feature 1 */
hw_cap = readl(ioaddr + XGMAC_HW_FEATURE1);
--
2.25.1
^ permalink raw reply [flat|nested] 5+ messages in thread* [PATCH net v3 3/3] net: stmmac: Set CIC bit only for TX queues with COE
2025-08-25 4:36 [PATCH net v3 0/3] net: stmmac: xgmac: Minor fixes Rohan G Thomas via B4 Relay
2025-08-25 4:36 ` [PATCH net v3 1/3] net: stmmac: xgmac: Do not enable RX FIFO Overflow interrupts Rohan G Thomas via B4 Relay
2025-08-25 4:36 ` [PATCH net v3 2/3] net: stmmac: xgmac: Correct supported speed modes Rohan G Thomas via B4 Relay
@ 2025-08-25 4:36 ` Rohan G Thomas via B4 Relay
2025-08-27 1:20 ` [PATCH net v3 0/3] net: stmmac: xgmac: Minor fixes patchwork-bot+netdevbpf
3 siblings, 0 replies; 5+ messages in thread
From: Rohan G Thomas via B4 Relay @ 2025-08-25 4:36 UTC (permalink / raw)
To: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni, Maxime Coquelin, Alexandre Torgue, Jose Abreu,
Romain Gantois, Serge Semin, Ong Boon Leong
Cc: netdev, linux-stm32, linux-arm-kernel, linux-kernel,
Rohan G Thomas, Matthew Gerlach
From: Rohan G Thomas <rohan.g.thomas@altera.com>
Currently, in the AF_XDP transmit paths, the CIC bit of
TX Desc3 is set for all packets. Setting this bit for
packets transmitting through queues that don't support
checksum offloading causes the TX DMA to get stuck after
transmitting some packets. This patch ensures the CIC bit
of TX Desc3 is set only if the TX queue supports checksum
offloading.
Fixes: 132c32ee5bc0 ("net: stmmac: Add TX via XDP zero-copy socket")
Signed-off-by: Rohan G Thomas <rohan.g.thomas@altera.com>
Reviewed-by: Matthew Gerlach <matthew.gerlach@altera.com>
---
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index fa3d26c285025d01c72cef51add534fc722552b8..143e68639548f390e97b5a8dd09f3f4af12cec43 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -2585,6 +2585,7 @@ static bool stmmac_xdp_xmit_zc(struct stmmac_priv *priv, u32 queue, u32 budget)
struct netdev_queue *nq = netdev_get_tx_queue(priv->dev, queue);
struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue];
struct stmmac_txq_stats *txq_stats = &priv->xstats.txq_stats[queue];
+ bool csum = !priv->plat->tx_queues_cfg[queue].coe_unsupported;
struct xsk_buff_pool *pool = tx_q->xsk_pool;
unsigned int entry = tx_q->cur_tx;
struct dma_desc *tx_desc = NULL;
@@ -2672,7 +2673,7 @@ static bool stmmac_xdp_xmit_zc(struct stmmac_priv *priv, u32 queue, u32 budget)
}
stmmac_prepare_tx_desc(priv, tx_desc, 1, xdp_desc.len,
- true, priv->mode, true, true,
+ csum, priv->mode, true, true,
xdp_desc.len);
stmmac_enable_dma_transmission(priv, priv->ioaddr, queue);
@@ -4987,6 +4988,7 @@ static int stmmac_xdp_xmit_xdpf(struct stmmac_priv *priv, int queue,
{
struct stmmac_txq_stats *txq_stats = &priv->xstats.txq_stats[queue];
struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue];
+ bool csum = !priv->plat->tx_queues_cfg[queue].coe_unsupported;
unsigned int entry = tx_q->cur_tx;
struct dma_desc *tx_desc;
dma_addr_t dma_addr;
@@ -5038,7 +5040,7 @@ static int stmmac_xdp_xmit_xdpf(struct stmmac_priv *priv, int queue,
stmmac_set_desc_addr(priv, tx_desc, dma_addr);
stmmac_prepare_tx_desc(priv, tx_desc, 1, xdpf->len,
- true, priv->mode, true, true,
+ csum, priv->mode, true, true,
xdpf->len);
tx_q->tx_count_frames++;
--
2.25.1
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH net v3 0/3] net: stmmac: xgmac: Minor fixes
2025-08-25 4:36 [PATCH net v3 0/3] net: stmmac: xgmac: Minor fixes Rohan G Thomas via B4 Relay
` (2 preceding siblings ...)
2025-08-25 4:36 ` [PATCH net v3 3/3] net: stmmac: Set CIC bit only for TX queues with COE Rohan G Thomas via B4 Relay
@ 2025-08-27 1:20 ` patchwork-bot+netdevbpf
3 siblings, 0 replies; 5+ messages in thread
From: patchwork-bot+netdevbpf @ 2025-08-27 1:20 UTC (permalink / raw)
To: Rohan G Thomas
Cc: andrew+netdev, davem, edumazet, kuba, pabeni, mcoquelin.stm32,
alexandre.torgue, Jose.Abreu, romain.gantois, fancer.lancer,
boon.leong.ong, netdev, linux-stm32, linux-arm-kernel,
linux-kernel, matthew.gerlach, andrew
Hello:
This series was applied to netdev/net.git (main)
by Jakub Kicinski <kuba@kernel.org>:
On Mon, 25 Aug 2025 12:36:51 +0800 you wrote:
> This patch series includes following minor fixes for stmmac
> dwxgmac driver:
>
> 1. Disable Rx FIFO overflow interrupt for dwxgmac
> 2. Correct supported speed modes for dwxgmac
> 3. Check for coe-unsupported flag before setting CIC bit of
> Tx Desc3 in the AF_XDP flow
>
> [...]
Here is the summary with links:
- [net,v3,1/3] net: stmmac: xgmac: Do not enable RX FIFO Overflow interrupts
https://git.kernel.org/netdev/net/c/4f23382841e6
- [net,v3,2/3] net: stmmac: xgmac: Correct supported speed modes
https://git.kernel.org/netdev/net/c/42ef11b2bff5
- [net,v3,3/3] net: stmmac: Set CIC bit only for TX queues with COE
https://git.kernel.org/netdev/net/c/b1eded580ab2
You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html
^ permalink raw reply [flat|nested] 5+ messages in thread