From: Inochi Amaoto <inochiama@gmail.com>
To: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Chen Wang <unicorn_wang@outlook.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Zixian Zeng <sycamoremoon376@gmail.com>
Cc: Inochi Amaoto <inochiama@gmail.com>,
devicetree@vger.kernel.org, sophgo@lists.linux.dev,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
Han Gao <rabenda.cn@gmail.com>, Longbin Li <looong.bin@gmail.com>
Subject: Re: [PATCH v2 0/4] Add SPI NOR DTS node for SG2042 SoC and boards using it
Date: Tue, 18 Nov 2025 09:19:12 +0800 [thread overview]
Message-ID: <176342869620.638242.11529006624321296909.b4-ty@gmail.com> (raw)
In-Reply-To: <20250916-sfg-spidts-v2-0-b5d9024fe1c8@gmail.com>
On Tue, 16 Sep 2025 21:22:49 +0800, Zixian Zeng wrote:
> [PATCH 1/4] and [PATCH 2/4] are copied from patch set [1]
> [PATCH v4 4/4] with content changes:
>
> According to SG2042 Pioneer and SG2042_EVB_V1/V2 schematics, SPI-NOR Flash
> cannot support QSPI due to hardware design.
> Thus spi-(tx|rx)-bus-width must be set to 1.
>
> [...]
Applied to dt/riscv, thanks!
[1/4] riscv: dts: sophgo: Add SPI NOR node for SG2042
https://github.com/sophgo/linux/commit/59dc89fdfe0bbcce186116651bd017cfb9f70fc0
[2/4] riscv: dts: sophgo: Enable SPI NOR node for PioneerBox
https://github.com/sophgo/linux/commit/f49314cbbc98f9ab2bf4eb82ccacbf79f179db6c
[3/4] riscv: dts: sophgo: Enable SPI NOR node for SG2042_EVB_V1
https://github.com/sophgo/linux/commit/11f4d84c9f724ec4c6810567d6b9713b054bb28b
[4/4] riscv: dts: sophgo: Enable SPI NOR node for SG2042_EVB_V2
https://github.com/sophgo/linux/commit/af5eb17ff893bf6e52680a31059e1816749c2d20
Thanks,
Inochi
prev parent reply other threads:[~2025-11-18 1:19 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-16 13:22 Zixian Zeng
2025-09-16 13:22 ` [PATCH v2 1/4] riscv: dts: sophgo: Add SPI NOR node for SG2042 Zixian Zeng
2025-09-16 13:22 ` [PATCH v2 2/4] riscv: dts: sophgo: Enable SPI NOR node for PioneerBox Zixian Zeng
2025-09-16 13:22 ` [PATCH v2 3/4] riscv: dts: sophgo: Enable SPI NOR node for SG2042_EVB_V1 Zixian Zeng
2025-09-16 13:22 ` [PATCH v2 4/4] riscv: dts: sophgo: Enable SPI NOR node for SG2042_EVB_V2 Zixian Zeng
2025-11-18 1:19 ` Inochi Amaoto [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=176342869620.638242.11529006624321296909.b4-ty@gmail.com \
--to=inochiama@gmail.com \
--cc=alex@ghiti.fr \
--cc=aou@eecs.berkeley.edu \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=krzk+dt@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=looong.bin@gmail.com \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=rabenda.cn@gmail.com \
--cc=robh@kernel.org \
--cc=sophgo@lists.linux.dev \
--cc=sycamoremoon376@gmail.com \
--cc=unicorn_wang@outlook.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®