From: Madhavan Srinivasan <maddy@linux.ibm.com>
To: Michael Ellerman <mpe@ellerman.id.au>,
Nicholas Piggin <npiggin@gmail.com>,
"Christophe Leroy (CS GROUP)" <chleroy@kernel.org>
Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
Christian Zigotzky <chzigotzky@xenosoft.de>,
Guenter Roeck <linux@roeck-us.net>
Subject: Re: [PATCH] powerpc/32: Restore disabling of interrupts at interrupt/syscall exit
Date: Sat, 27 Dec 2025 09:53:50 +0530 [thread overview]
Message-ID: <176680916371.22434.11687040747709449917.b4-ty@linux.ibm.com> (raw)
In-Reply-To: <585ea521b2be99d293b539bbfae148366cfb3687.1766146895.git.chleroy@kernel.org>
On Fri, 19 Dec 2025 13:23:52 +0100, Christophe Leroy (CS GROUP) wrote:
> Commit 2997876c4a1a ("powerpc/32: Restore clearing of MSR[RI] at
> interrupt/syscall exit") delayed clearing of MSR[RI], but missed that
> both MSR[RI] and MSR[EE] are cleared at the same time, so the commit
> also delayed the disabling of interrupts, leading to unexpected
> behaviour.
>
> To fix that, mostly revert the blamed commit and restore the clearing
> of MSR[RI] in interrupt_exit_kernel_prepare() instead. For 8xx it
> implies adding a synchronising instruction after the mtspr in order to
> make sure no instruction counter interrupt (used for perf events) will
> fire just after clearing MSR[RI].
>
> [...]
Applied to powerpc/fixes.
[1/1] powerpc/32: Restore disabling of interrupts at interrupt/syscall exit
https://git.kernel.org/powerpc/c/608328ba5b0619cbc28b409296b5e3840bcb97b6
cheers
prev parent reply other threads:[~2025-12-27 4:24 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-19 12:23 Christophe Leroy (CS GROUP)
2025-12-20 11:17 ` Christian Zigotzky
2025-12-22 12:16 ` Madhavan Srinivasan
2025-12-24 10:04 ` Christophe Leroy (CS GROUP)
2025-12-27 4:23 ` Madhavan Srinivasan [this message]
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