From: Stephen Boyd <sboyd@kernel.org>
To: Nadi Ke <kenadicanady@gmail.com>,
baolin.wang@linux.alibaba.com, conor+dt@kernel.org,
krzk+dt@kernel.org, mturquette@baylibre.com, orsonzhai@gmail.com,
robh@kernel.org
Cc: zhang.lyra@gmail.com, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Nadi Ke <kenadicanady@gmail.com>
Subject: Re: [PATCH v2 2/2] Add clock driver for Unisoc SC9832E SoC.
Date: Fri, 23 Jan 2026 11:50:30 -0700 [thread overview]
Message-ID: <176919423048.4027.4488503741628294165@lazor> (raw)
In-Reply-To: <20260121071412.256215-3-kenadicanady@gmail.com>
Quoting Nadi Ke (2026-01-21 00:14:12)
> diff --git a/drivers/clk/sprd/sc9832e-clk.c b/drivers/clk/sprd/sc9832e-clk.c
> new file mode 100644
> index 000000000..0574097b0
> --- /dev/null
> +++ b/drivers/clk/sprd/sc9832e-clk.c
> @@ -0,0 +1,1077 @@
[...]
> +};
> +
> +static const struct of_device_id sprd_sc9832e_clk_ids[] = {
> + { .compatible = "sprd,sc9832e-glbregs", /* 0x402b0000 */
> + .data = &sc9832e_pmu_gate_desc },
> + { .compatible = "sprd,sc9832e-pll", /* 0x403c0000 */
> + .data = &sc9832e_pll_desc },
> + { .compatible = "sprd,sc9832e-mpll", /* 0x403f0000 */
> + .data = &sc9832e_mpll_desc },
> + { .compatible = "sprd,sc9832e-dpll", /* 0x403d0000 */
> + .data = &sc9832e_dpll_desc },
> + { .compatible = "sprd,sc9832e-rpll", /* 0x40410000 */
> + .data = &sc9832e_rpll_desc },
> + { .compatible = "sprd,sc9832e-apahb-gate", /* 0x20e00000 */
> + .data = &sc9832e_apahb_gate_desc },
> + { .compatible = "sprd,sc9832e-aonapb-gate", /* 0x402e0000 */
> + .data = &sc9832e_aonapb_gate_desc },
> + { .compatible = "sprd,sc9832e-ap-clk", /* 0x21500000 */
> + .data = &sc9832e_ap_clk_desc },
> + { .compatible = "sprd,sc9832e-aon-clk", /* 0x402d0000 */
> + .data = &sc9832e_aon_clk_desc },
> + { .compatible = "sprd,sc9832e-apapb-gate", /* 0x71300000 */
> + .data = &sc9832e_apapb_gate_desc },
> + { }
> +};
> +MODULE_DEVICE_TABLE(of, sprd_sc9832e_clk_ids);
Please move this after probe next to the driver structure.
> +
> +static int sc9832e_clk_probe(struct platform_device *pdev)
> +{
> + const struct of_device_id *match;
> + const struct sprd_clk_desc *desc;
> + int ret;
> +
> + match = of_match_node(sprd_sc9832e_clk_ids, pdev->dev.of_node);
Use device_get_match_data()
> + if (!match)
> + return -ENODEV;
> +
> + desc = match->data;
> +
prev parent reply other threads:[~2026-01-23 18:50 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-21 7:14 [PATCH v2 0/2] clk: sprd: Add support for Unisoc SC9832E clocks Nadi Ke
2026-01-21 7:14 ` [PATCH v2 1/2] dt-bindings: clock: sprd: add SC9832E clock controller Nadi Ke
2026-01-22 8:01 ` Krzysztof Kozlowski
2026-01-21 7:14 ` [PATCH v2 2/2] Add clock driver for Unisoc SC9832E SoC Nadi Ke
2026-01-23 18:50 ` Stephen Boyd [this message]
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