From: Bjorn Andersson <andersson@kernel.org>
To: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
Taniya Das <taniya.das@oss.qualcomm.com>,
Abel Vesa <abel.vesa@oss.qualcomm.com>
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org,
Nitin Rawat <nitin.rawat@oss.qualcomm.com>
Subject: Re: [PATCH] clk: qcom: gcc-eliza: Enable FORCE_MEM_CORE_ON for UFS AXI PHY clock
Date: Mon, 30 Mar 2026 11:01:07 -0500 [thread overview]
Message-ID: <177488647736.633011.9930860140361417185.b4-ty@kernel.org> (raw)
In-Reply-To: <20260323-eliza-gcc-set-ufs-axi-phyforce-mem-core-on-v1-1-b6b7a6f3f8c5@oss.qualcomm.com>
On Mon, 23 Mar 2026 20:57:12 +0200, Abel Vesa wrote:
> According to internal documentation, the UFS AXI PHY clock requires
> FORCE_MEM_CORE_ON to be enabled for UFS MCQ mode to work. Without this,
> the UFS controller fails when operating in MCQ mode, which is already
> enabled in the device tree.
>
> The UFS PHY ICE core clock already has this bit set, so apply the same
> configuration to the UFS PHY AXI clock.
>
> [...]
Applied, thanks!
[1/1] clk: qcom: gcc-eliza: Enable FORCE_MEM_CORE_ON for UFS AXI PHY clock
commit: 3006f7fbc7ef53bf8316b02d7f23f647b24c3eca
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
prev parent reply other threads:[~2026-03-30 16:01 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-23 18:57 Abel Vesa
2026-03-23 19:25 ` Dmitry Baryshkov
2026-03-24 9:14 ` Konrad Dybcio
2026-03-24 11:58 ` Nitin Rawat
2026-03-24 22:29 ` Dmitry Baryshkov
2026-03-24 9:21 ` Konrad Dybcio
2026-03-24 9:15 ` Konrad Dybcio
2026-03-24 9:24 ` Taniya Das
2026-03-30 16:01 ` Bjorn Andersson [this message]
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