From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Abel Vesa <abel.vesa@oss.qualcomm.com>,
Bjorn Andersson <andersson@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,
Taniya Das <taniya.das@oss.qualcomm.com>
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org,
Nitin Rawat <nitin.rawat@oss.qualcomm.com>
Subject: Re: [PATCH] clk: qcom: gcc-eliza: Enable FORCE_MEM_CORE_ON for UFS AXI PHY clock
Date: Tue, 24 Mar 2026 10:15:52 +0100 [thread overview]
Message-ID: <b195f47e-9bbe-4fa2-a29d-b24eefc94226@oss.qualcomm.com> (raw)
In-Reply-To: <20260323-eliza-gcc-set-ufs-axi-phyforce-mem-core-on-v1-1-b6b7a6f3f8c5@oss.qualcomm.com>
On 3/23/26 7:57 PM, Abel Vesa wrote:
> According to internal documentation, the UFS AXI PHY clock requires
> FORCE_MEM_CORE_ON to be enabled for UFS MCQ mode to work. Without this,
> the UFS controller fails when operating in MCQ mode, which is already
> enabled in the device tree.
>
> The UFS PHY ICE core clock already has this bit set, so apply the same
> configuration to the UFS PHY AXI clock.
>
> Fixes: 3d356ab4a1ec ("clk: qcom: Add support for Global clock controller on Eliza")
> Reported-by: Nitin Rawat <nitin.rawat@oss.qualcomm.com>
> Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
next prev parent reply other threads:[~2026-03-24 9:15 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-23 18:57 Abel Vesa
2026-03-23 19:25 ` Dmitry Baryshkov
2026-03-24 9:14 ` Konrad Dybcio
2026-03-24 11:58 ` Nitin Rawat
2026-03-24 22:29 ` Dmitry Baryshkov
2026-03-24 9:21 ` Konrad Dybcio
2026-03-24 9:15 ` Konrad Dybcio [this message]
2026-03-24 9:24 ` Taniya Das
2026-03-30 16:01 ` Bjorn Andersson
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