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* [PATCH] mtd: rawnand: add Toshiba TC58NVG1S3H
@ 2026-07-15  1:18 James Hilliard
  2026-07-17 15:48 ` Miquel Raynal
  0 siblings, 1 reply; 2+ messages in thread
From: James Hilliard @ 2026-07-15  1:18 UTC (permalink / raw)
  To: linux-mtd
  Cc: James Hilliard, Miquel Raynal, Richard Weinberger,
	Vignesh Raghavendra, Thomas Gleixner, linux-kernel

Without a full-ID entry, the non-ONFI TC58NVG1S3H falls back to the
generic 0xda extended-ID decoding. It is therefore identified only as a
generic 256 MiB Toshiba NAND. Without a model-specific interface
configuration, the core leaves it in the conservative reset timing mode.

Add its full five-byte ID with the datasheet geometry, OOB size and ECC
requirements. Its interface timings match the mode-4-derived profile
already used by the related TH58NVG2S3HBAI4 and TH58NVG3S0HBAI4, so
share that profile and select it for the new model.

Signed-off-by: James Hilliard <james.hilliard1@gmail.com>
---
 drivers/mtd/nand/raw/nand_ids.c     | 3 +++
 drivers/mtd/nand/raw/nand_toshiba.c | 4 +++-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/raw/nand_ids.c b/drivers/mtd/nand/raw/nand_ids.c
index 62a8cf86d9e2..08707ce9d7c0 100644
--- a/drivers/mtd/nand/raw/nand_ids.c
+++ b/drivers/mtd/nand/raw/nand_ids.c
@@ -29,6 +29,9 @@ struct nand_flash_dev nand_flash_ids[] = {
 	{"TC58NVG0S3E 1G 3.3V 8-bit",
 		{ .id = {0x98, 0xd1, 0x90, 0x15, 0x76, 0x14, 0x01, 0x00} },
 		  SZ_2K, SZ_128, SZ_128K, 0, 8, 64, NAND_ECC_INFO(1, SZ_512), },
+	{"TC58NVG1S3H 2G 3.3V 8-bit",
+		{ .id = {0x98, 0xda, 0x90, 0x15, 0x76} },
+		  SZ_2K, SZ_256, SZ_128K, 0, 5, 128, NAND_ECC_INFO(8, SZ_512) },
 	{"TC58NVG2S0F 4G 3.3V 8-bit",
 		{ .id = {0x98, 0xdc, 0x90, 0x26, 0x76, 0x15, 0x01, 0x08} },
 		  SZ_4K, SZ_512, SZ_256K, 0, 8, 224, NAND_ECC_INFO(4, SZ_512) },
diff --git a/drivers/mtd/nand/raw/nand_toshiba.c b/drivers/mtd/nand/raw/nand_toshiba.c
index d3d34d71921f..32062b26a1f6 100644
--- a/drivers/mtd/nand/raw/nand_toshiba.c
+++ b/drivers/mtd/nand/raw/nand_toshiba.c
@@ -287,7 +287,9 @@ static int toshiba_nand_init(struct nand_chip *chip)
 	if (!strncmp("TC58NVG0S3E", chip->parameters.model,
 		     sizeof("TC58NVG0S3E") - 1))
 		tc58nvg0s3e_init(chip);
-	if ((!strncmp("TH58NVG2S3HBAI4", chip->parameters.model,
+	if ((!strncmp("TC58NVG1S3H", chip->parameters.model,
+		      sizeof("TC58NVG1S3H") - 1)) ||
+	    (!strncmp("TH58NVG2S3HBAI4", chip->parameters.model,
 		     sizeof("TH58NVG2S3HBAI4") - 1)) ||
 	    (!strncmp("TH58NVG3S0HBAI4", chip->parameters.model,
 		     sizeof("TH58NVG3S0HBAI4") - 1)))
-- 
2.53.0


^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [PATCH] mtd: rawnand: add Toshiba TC58NVG1S3H
  2026-07-15  1:18 [PATCH] mtd: rawnand: add Toshiba TC58NVG1S3H James Hilliard
@ 2026-07-17 15:48 ` Miquel Raynal
  0 siblings, 0 replies; 2+ messages in thread
From: Miquel Raynal @ 2026-07-17 15:48 UTC (permalink / raw)
  To: linux-mtd, James Hilliard
  Cc: Richard Weinberger, Vignesh Raghavendra, Thomas Gleixner, linux-kernel

On Tue, 14 Jul 2026 19:18:00 -0600, James Hilliard wrote:
> Without a full-ID entry, the non-ONFI TC58NVG1S3H falls back to the
> generic 0xda extended-ID decoding. It is therefore identified only as a
> generic 256 MiB Toshiba NAND. Without a model-specific interface
> configuration, the core leaves it in the conservative reset timing mode.
> 
> Add its full five-byte ID with the datasheet geometry, OOB size and ECC
> requirements. Its interface timings match the mode-4-derived profile
> already used by the related TH58NVG2S3HBAI4 and TH58NVG3S0HBAI4, so
> share that profile and select it for the new model.
> 
> [...]

Applied to nand/next, thanks!

[1/1] mtd: rawnand: add Toshiba TC58NVG1S3H
      commit: 0ee27d8e4c99765215d906b4ea1fb6bf7e9650d7

Patche(s) should be available on mtd/linux.git and will be
part of the next PR (provided that no robot complains by then).

Kind regards,
Miquèl


^ permalink raw reply	[flat|nested] 2+ messages in thread

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