From: Bjorn Andersson <andersson@kernel.org>
To: sboyd@kernel.org, Joonhoe Kim <26rote@gmail.com>
Cc: mturquette@baylibre.com, taniya.das@oss.qualcomm.com,
dmitry.baryshkov@oss.qualcomm.com,
konrad.dybcio@oss.qualcomm.com, abelvesa@kernel.org,
bmasney+clk@redhat.com, jbrunet+clk@baylibre.com,
nitin.rawat@oss.qualcomm.com, linux-arm-msm@vger.kernel.org,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] clk: qcom: gcc-kaanapali: Enable FORCE_MEM_CORE_ON for UFS AXI PHY clock
Date: Sun, 8 Nov 2026 14:19:08 -0600 [thread overview]
Message-ID: <179416929331.628393.12470274036795271471.b4-ty@b4> (raw)
In-Reply-To: <20261007143716.2161-1-26rote@gmail.com>
On Wed, 07 Oct 2026 23:37:16 +0900, Joonhoe Kim wrote:
> As on SM8650, SM8750 and Eliza, the UFS AXI PHY clock needs
> FORCE_MEM_CORE_ON for the UFS controller in MCQ mode. Without it the MCQ
> configuration is lost over system suspend, and with MCQ enabled every
> resume from s2idle ends in an SMMU fault and a host reset.
>
> The UFS PHY ICE core clock already has the bit set; set it for the UFS
> PHY AXI clock as well.
>
> [...]
Applied, thanks!
[1/1] clk: qcom: gcc-kaanapali: Enable FORCE_MEM_CORE_ON for UFS AXI PHY clock
commit: ab3c9fbc73091b3c132fce5827ef7de2f5bcd58a
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
prev parent reply other threads:[~2026-11-08 20:21 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-07 14:37 Joonhoe Kim
2026-10-09 18:22 ` Abel Vesa
2026-10-13 7:34 ` Taniya Das
2026-11-08 20:19 ` Bjorn Andersson [this message]
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