[PATCH] riscv: pci: allow write-combining mmap of PCI BARs

[PATCH] riscv: pci: allow write-combining mmap of PCI BARs

[Troy Mitchell]

Define arch_can_pci_mmap_wc() for RISC-V, so that the PCI core can
create resourceN_wc in sysfs for prefetchable BARs. Without it, the only
sysfs mapping of such a BAR is resourceN, which uses pgprot_device():
with Svpbmt or XTheadMae that is the IO memory type, where every access
is strongly ordered and nothing is merged.

resourceN_wc is mapped with pgprot_writecombine(), which selects the NC
memory type when the kernel uses Svpbmt or XTheadMae. Without either,
_PAGE_NOCACHE is 0 and pgprot_writecombine() changes nothing, so
resourceN_wc would get the same PMA-defined attributes as resourceN and
no write-combining at all. Make arch_can_pci_mmap_wc() true only when
_PAGE_NOCACHE is non-zero. On 64-bit this is a runtime check, as
_PAGE_NOCACHE is chosen at boot from the CPU extensions; on 32-bit it is
always 0, so nothing changes there.

Signed-off-by: Troy Mitchell <troy@kernel.org>
---
 arch/riscv/include/asm/pci.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/riscv/include/asm/pci.h b/arch/riscv/include/asm/pci.h
index b2f91abebd61..2b2db5533576 100644
--- a/arch/riscv/include/asm/pci.h
+++ b/arch/riscv/include/asm/pci.h
@@ -9,6 +9,7 @@
 #include <linux/types.h>
 #include <linux/slab.h>
 #include <linux/dma-mapping.h>
+#include <linux/pgtable.h>
 
 #include <asm/io.h>
 
@@ -32,6 +33,14 @@ static inline int pcibus_to_node(struct pci_bus *bus)
 #endif
 #endif /* defined(CONFIG_PCI) && defined(CONFIG_NUMA) */
 
+/*
+ * resourceN_wc is mapped with pgprot_writecombine(), which gives the NC
+ * memory type only with Svpbmt or XTheadMae. With neither it changes
+ * nothing and resourceN_wc would be no different from resourceN, so only
+ * offer WC mmap when there is an NC type to use.
+ */
+#define arch_can_pci_mmap_wc()	(_PAGE_NOCACHE != 0)
+
 /* Generic PCI */
 #include <asm-generic/pci.h>
 

---
base-commit: 6628e7d4c6b25c8d18f1345e3a20d21829aae7e4
change-id: 20261109-riscv-pci-mmap-wc-f56ec5e12557

Best regards,
--  
Troy Mitchell <troy@kernel.org>

Re: [PATCH] riscv: pci: allow write-combining mmap of PCI BARs

[patchwork-bot+linux-riscv]

Hello:

This patch was applied to riscv/linux.git (fixes)
by Paul Walmsley <pjw@kernel.org>:

On Tue, 10 Nov 2026 15:04:49 +0000 you wrote:
> Define arch_can_pci_mmap_wc() for RISC-V, so that the PCI core can
> create resourceN_wc in sysfs for prefetchable BARs. Without it, the only
> sysfs mapping of such a BAR is resourceN, which uses pgprot_device():
> with Svpbmt or XTheadMae that is the IO memory type, where every access
> is strongly ordered and nothing is merged.
> 
> resourceN_wc is mapped with pgprot_writecombine(), which selects the NC
> memory type when the kernel uses Svpbmt or XTheadMae. Without either,
> _PAGE_NOCACHE is 0 and pgprot_writecombine() changes nothing, so
> resourceN_wc would get the same PMA-defined attributes as resourceN and
> no write-combining at all. Make arch_can_pci_mmap_wc() true only when
> _PAGE_NOCACHE is non-zero. On 64-bit this is a runtime check, as
> _PAGE_NOCACHE is chosen at boot from the CPU extensions; on 32-bit it is
> always 0, so nothing changes there.
> 
> [...]

Here is the summary with links:
  - riscv: pci: allow write-combining mmap of PCI BARs
    https://git.kernel.org/riscv/c/79fc9d9467a1

You are awesome, thank you!
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