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* [PATCH] clk: sunxi-ng: h616: register CPU PLL notifier before mux notifier
@ 2026-11-09  9:09 Ilya Titov
  2026-11-15  9:41 ` Chen-Yu Tsai
  0 siblings, 1 reply; 2+ messages in thread
From: Ilya Titov @ 2026-11-09  9:09 UTC (permalink / raw)
  To: sboyd, wens, jernej.skrabec, samuel, andre.przywara
  Cc: bmasney+clk, jbrunet+clk, linux-clk, linux-arm-kernel,
	linux-sunxi, linux-kernel, stable, Ilya Titov

Currently the CPU mux notifier is registered first, so on
POST_RATE_CHANGE the CPU is switched back to PLL_CPUX before the PLL
notifier re-locks it. The CPU then runs from the PLL while it is still
settling. The comment for ccu_pll_notifier_cb() says it must be
registered first, and the other sunxi-ng drivers (A33, H3, R40, A64,
A100) do it in that order.

We see random hangs and oopses on T507 based boards when cpufreq
switches frequency often. In the oopses and JTAG dumps we captured, CPU0
was always in ccu_mux_notifier_cb() or ccu_pll_notifier_cb(). Other
CPUs were usually stuck on dsb after tlbi, waiting for CPU0.

Running a random walk over all OPPs with some load on other cores, two
boards hung 20+ times in about 3 days. With the PLL notifier registered
first there were no hangs in the same time.

Fixes: 087b4083d3f9 ("clk: sunxi-ng: h616: Reparent CPU clock during frequency changes")
Cc: stable@vger.kernel.org
Signed-off-by: Ilya Titov <ilya.titov@wirenboard.com>
---
 drivers/clk/sunxi-ng/ccu-sun50i-h616.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h616.c b/drivers/clk/sunxi-ng/ccu-sun50i-h616.c
index 955c614830fa..00b7811f3a84 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-h616.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-h616.c
@@ -1235,13 +1235,16 @@ static int sun50i_h616_ccu_probe(struct platform_device *pdev)
 	if (ret)
 		return ret;
 
+	/*
+	 * Re-lock the CPU PLL after any rate changes. Must be registered
+	 * before the mux notifier, so CPU goes back to a locked PLL.
+	 */
+	ccu_pll_notifier_register(&sun50i_h616_pll_cpu_nb);
+
 	/* Reparent CPU during CPU PLL rate changes */
 	ccu_mux_notifier_register(pll_cpux_clk.common.hw.clk,
 				  &sun50i_h616_cpu_nb);
 
-	/* Re-lock the CPU PLL after any rate changes */
-	ccu_pll_notifier_register(&sun50i_h616_pll_cpu_nb);
-
 	/* Reparent GPU during GPU PLL rate changes */
 	ccu_mux_notifier_register(pll_gpu_clk.common.hw.clk,
 				  &sun50i_h616_gpu_nb);
-- 
2.54.0 (Apple Git-157)


^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [PATCH] clk: sunxi-ng: h616: register CPU PLL notifier before mux notifier
  2026-11-09  9:09 [PATCH] clk: sunxi-ng: h616: register CPU PLL notifier before mux notifier Ilya Titov
@ 2026-11-15  9:41 ` Chen-Yu Tsai
  0 siblings, 0 replies; 2+ messages in thread
From: Chen-Yu Tsai @ 2026-11-15  9:41 UTC (permalink / raw)
  To: sboyd, jernej.skrabec, samuel, andre.przywara, Ilya Titov
  Cc: bmasney+clk, jbrunet+clk, linux-clk, linux-arm-kernel,
	linux-sunxi, linux-kernel, stable

On Mon, 09 Nov 2026 12:09:14 +0300, Ilya Titov wrote:
> Currently the CPU mux notifier is registered first, so on
> POST_RATE_CHANGE the CPU is switched back to PLL_CPUX before the PLL
> notifier re-locks it. The CPU then runs from the PLL while it is still
> settling. The comment for ccu_pll_notifier_cb() says it must be
> registered first, and the other sunxi-ng drivers (A33, H3, R40, A64,
> A100) do it in that order.
> 
> [...]

Applied to sunxi/clk-for-7.5 in sunxi, thanks!

[1/1] clk: sunxi-ng: h616: register CPU PLL notifier before mux notifier
      https://git.kernel.org/sunxi/linux/c/0ec5e7572ddc

Best regards,
-- 
Chen-Yu Tsai <wens@kernel.org>


^ permalink raw reply	[flat|nested] 2+ messages in thread

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2026-11-09  9:09 [PATCH] clk: sunxi-ng: h616: register CPU PLL notifier before mux notifier Ilya Titov
2026-11-15  9:41 ` Chen-Yu Tsai

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