From: Marc Zyngier <maz@kernel.org>
To: Zenghui Yu <yuzenghui@huawei.com>
Cc: linux-kernel@vger.kernel.org, tglx@linutronix.de,
jason@lakedaemon.net, wanghaibin.wang@huawei.com
Subject: Re: [PATCH] irqchip/gic-v4.1: Ensure accessing the correct RD when writing INVALLR
Date: Mon, 20 Jul 2020 08:41:30 +0100 [thread overview]
Message-ID: <18d2a3da66cd94d98dac178281f77e22@kernel.org> (raw)
In-Reply-To: <4d79c6f0-cb38-70fc-93e7-0172417ecbfd@huawei.com>
Hi Zenghui,
On 2020-07-20 03:27, Zenghui Yu wrote:
> Hi Marc,
>
> On 2020/7/17 19:07, Marc Zyngier wrote:
>> On Thu, 09 Jul 2020 14:49:59 +0100,
>> Zenghui Yu <yuzenghui@huawei.com> wrote:
>>>
>>> The GICv4.1 spec tells us that it's CONSTRAINED UNPREDICTABLE to
>>> issue a
>>> register-based invalidation operation for a vPEID not mapped to that
>>> RD,
>>> or another RD within the same CommonLPIAff group.
>>>
>>> To follow this rule, commit f3a059219bc7 ("irqchip/gic-v4.1: Ensure
>>> mutual
>>> exclusion between vPE affinity change and RD access") tried to
>>> address the
>>> race between the RD accesses and the vPE affinity change, but somehow
>>> forgot to take GICR_INVALLR into account. Let's take the vpe_lock
>>> before
>>> evaluating vpe->col_idx to fix it.
>>>
>>> Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
>>
>> Shouldn't this deserve a Fixes: tag?
>
> Yes, I think a
>
> Fixes: f3a059219bc7 ("irqchip/gic-v4.1: Ensure mutual exclusion
> between vPE affinity change and RD access")
>
> should be enough. Should I resend a version with the tag added?
Yes, please, together with a Cc: stable@vger.kernel.org, as the
original patch is in 5.7 and I intend to take it via the 5.9
branch.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
prev parent reply other threads:[~2020-07-20 7:41 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-09 13:49 Zenghui Yu
2020-07-17 11:07 ` Marc Zyngier
2020-07-20 2:27 ` Zenghui Yu
2020-07-20 7:41 ` Marc Zyngier [this message]
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