[PATCH 1/7] dt-bindings: nvmem: Convert Unisoc efuse controller binding to yaml

[PATCH 1/7] dt-bindings: nvmem: Convert Unisoc efuse controller binding to yaml

[Yanxin Huang]

Convert the Unisoc efuse controller binding to DT schema format.

Signed-off-by: Yanxin Huang <yanxin.huang@unisoc.com>
---
 .../devicetree/bindings/nvmem/sprd-efuse.txt  | 39 -----------
 .../devicetree/bindings/nvmem/sprd-efuse.yaml | 67 +++++++++++++++++++
 2 files changed, 67 insertions(+), 39 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/nvmem/sprd-efuse.txt
 create mode 100644 Documentation/devicetree/bindings/nvmem/sprd-efuse.yaml

diff --git a/Documentation/devicetree/bindings/nvmem/sprd-efuse.txt b/Documentation/devicetree/bindings/nvmem/sprd-efuse.txt
deleted file mode 100644
index 96b6feec27f0..000000000000
--- a/Documentation/devicetree/bindings/nvmem/sprd-efuse.txt
+++ /dev/null
@@ -1,39 +0,0 @@
-= Spreadtrum eFuse device tree bindings =
-
-Required properties:
-- compatible: Should be "sprd,ums312-efuse".
-- reg: Specify the address offset of efuse controller.
-- clock-names: Should be "enable".
-- clocks: The phandle and specifier referencing the controller's clock.
-- hwlocks: Reference to a phandle of a hwlock provider node.
-
-= Data cells =
-Are child nodes of eFuse, bindings of which as described in
-bindings/nvmem/nvmem.txt
-
-Example:
-
-       ap_efuse: efuse@32240000 {
-               compatible = "sprd,ums312-efuse";
-               reg = <0 0x32240000 0 0x10000>;
-               clock-names = "enable";
-               hwlocks = <&hwlock 8>;
-               clocks = <&aonapb_gate CLK_EFUSE_EB>;
-
-               /* Data cells */
-               thermal_calib: calib@10 {
-                       reg = <0x10 0x2>;
-               };
-       };
-
-= Data consumers =
-Are device nodes which consume nvmem data cells.
-
-Example:
-
-       thermal {
-               ...
-
-               nvmem-cells = <&thermal_calib>;
-               nvmem-cell-names = "calibration";
-       };
diff --git a/Documentation/devicetree/bindings/nvmem/sprd-efuse.yaml b/Documentation/devicetree/bindings/nvmem/sprd-efuse.yaml
new file mode 100644
index 000000000000..77106aca52c2
--- /dev/null
+++ b/Documentation/devicetree/bindings/nvmem/sprd-efuse.yaml
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/nvmem/sprd-efuse.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Unisoc eFuse controller
+
+maintainers:
+  - Orson Zhai <orsonzhai@gmail.com>
+  - Baolin Wang <baolin.wang7@gmail.com>
+  - Chunyan Zhang <zhang.lyra@gmail.com>
+
+allOf:
+  - $ref: nvmem.yaml#
+
+properties:
+  compatible:
+    enum:
+      - sprd,ums312-efuse
+
+  reg:
+    description:
+      Registers location and eFuse size.
+    maxItems: 1
+
+  clock-names:
+    const: enable
+
+  hwlocks:
+    description:
+      eFuse hwspinlock id.
+    maxItems: 1
+
+  clocks:
+    description:
+      eFuse clock id.
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - hwlocks
+  - clocks
+  - clock-names
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/sprd,sc9863a-clk.h>
+
+    aon {
+        #address-cells = <2>;
+        #size-cells = <2>;
+
+        ap_efuse: efuse@40240000 {
+            compatible = "sprd,sharkl3-efuse";
+            reg = <0 0x40240000 0 0x10000>;
+            #address-cells = <1>;
+            #size-cells = <1>;
+            clock-names = "enable";
+            hwlocks = <&hwlock 8>;
+            clocks = <&aonapb_gate CLK_EFUSE_EB>;
+        };
+    };
+...
--
2.17.1

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[PATCH 2/7] dt-bindings: nvmem: Add compatible for sharkl3, ums512, qogirl6, qogirn6pro, qogirn6lite

[Yanxin Huang]

Added unisoc sharkl3, ums512, qogirl6, qogirn6pro, qogirn6lite platform
compatible information.

Signed-off-by: Yanxin Huang <yanxin.huang@unisoc.com>
---
 Documentation/devicetree/bindings/nvmem/sprd-efuse.yaml | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/nvmem/sprd-efuse.yaml b/Documentation/devicetree/bindings/nvmem/sprd-efuse.yaml
index 77106aca52c2..5c5063c89734 100644
--- a/Documentation/devicetree/bindings/nvmem/sprd-efuse.yaml
+++ b/Documentation/devicetree/bindings/nvmem/sprd-efuse.yaml
@@ -17,7 +17,12 @@ allOf:
 properties:
   compatible:
     enum:
+      - sprd,sharkl3-efuse
       - sprd,ums312-efuse
+      - sprd,ums512-efuse
+      - sprd,qogirl6-efuse
+      - sprd,qogirn6pro-efuse
+      - sprd,qogirn6lite-efuse

   reg:
     description:
--
2.17.1

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[PATCH 3/7] nvmem: sprd: Modify sprd_efuse_write function

[Yanxin Huang]

The second parameter input to the sprd_efuse_raw_prog() interface
represents the efuse block index. The offset parameter in
sprd_efuse_write represents the offset address after the
efuse->data->blk_offset address, which does not represent the block index,
so passing offset to sprd_efuse_raw_prog() is incorrect.

The formula for calculating the block index is offset /
SPRD_EFUSE_BLOCK_WIDTH + efuse->data->blk_offset, where
SPRD_EFUSE_BLOCK_WIDTH is the size of a block.

This modification adds the parameter index, which calculates the correct
block index based on the offset, and passes it into the
sprd_efuse_raw_prog() interface.

Signed-off-by: Yanxin Huang <yanxin.huang@unisoc.com>
---
 drivers/nvmem/sprd-efuse.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/nvmem/sprd-efuse.c b/drivers/nvmem/sprd-efuse.c
index 4f1fcbfec394..3818d83de722 100644
--- a/drivers/nvmem/sprd-efuse.c
+++ b/drivers/nvmem/sprd-efuse.c
@@ -325,6 +325,7 @@ static int sprd_efuse_write(void *context, u32 offset, void *val, size_t bytes)
 {
        struct sprd_efuse *efuse = context;
        bool blk_double = efuse->data->blk_double;
+       u32 index = offset / SPRD_EFUSE_BLOCK_WIDTH + efuse->data->blk_offset;
        bool lock;
        int ret;

@@ -349,7 +350,7 @@ static int sprd_efuse_write(void *context, u32 offset, void *val, size_t bytes)
        else
                lock = true;

-       ret = sprd_efuse_raw_prog(efuse, offset, blk_double, lock, val);
+       ret = sprd_efuse_raw_prog(efuse, index, blk_double, lock, val);

        clk_disable_unprepare(efuse->clk);

--
2.17.1

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[PATCH 4/7] nvmem: sprd: Optimize the block lock operation

[Yanxin Huang]

We may program the efuse block partially many times, or we may program the
efuse block as a whole, but either way programming, the bytes parameter
passed in is SPRD_EFUSE_BLOCK_WIDTH. If we judge whether to lock the efuse
block or not by bytes and SPRD_efuse_block_WIDTH size, then the block will
be locked after the first time we programmed the efuse block, and we will
not be able to program the block again in the following period, so
removing the locked efuse block judgment.

In addition, since there is no need to lock the efuse block in the current
unisoc platform, we will change the default value of lock to flase, and
then develop according to the need if there is a need to lock the efuse
block.

Signed-off-by: Yanxin Huang <yanxin.huang@unisoc.com>
---
 drivers/nvmem/sprd-efuse.c | 15 +--------------
 1 file changed, 1 insertion(+), 14 deletions(-)

diff --git a/drivers/nvmem/sprd-efuse.c b/drivers/nvmem/sprd-efuse.c
index 3818d83de722..7370f8f9595f 100644
--- a/drivers/nvmem/sprd-efuse.c
+++ b/drivers/nvmem/sprd-efuse.c
@@ -326,7 +326,7 @@ static int sprd_efuse_write(void *context, u32 offset, void *val, size_t bytes)
        struct sprd_efuse *efuse = context;
        bool blk_double = efuse->data->blk_double;
        u32 index = offset / SPRD_EFUSE_BLOCK_WIDTH + efuse->data->blk_offset;
-       bool lock;
+       bool lock = false;
        int ret;

        ret = sprd_efuse_lock(efuse);
@@ -337,19 +337,6 @@ static int sprd_efuse_write(void *context, u32 offset, void *val, size_t bytes)
        if (ret)
                goto unlock;

-       /*
-        * If the writing bytes are equal with the block width, which means the
-        * whole block will be programmed. For this case, we should not allow
-        * this block to be programmed again by locking this block.
-        *
-        * If the block was programmed partially, we should allow this block to
-        * be programmed again.
-        */
-       if (bytes < SPRD_EFUSE_BLOCK_WIDTH)
-               lock = false;
-       else
-               lock = true;
-
        ret = sprd_efuse_raw_prog(efuse, index, blk_double, lock, val);

        clk_disable_unprepare(efuse->clk);
--
2.17.1

________________________________
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[PATCH 5/7] nvmem: sprd: Changing the position for turning off double bit operation

[Yanxin Huang]

There are two efuse block programming operations in sprd_efuse_raw_prog,
which require programming the same efuse block. Clearing the double bit
flag operation is between the two efuse block programming operations,
which will result in inconsistent efuse blocks between the two efuse
block programming operations.

This patch puts the double bit flag after the two efuse block programming
operations to ensure that both operations program the same efuse block.

Signed-off-by: Yanxin Huang <yanxin.huang@unisoc.com>
---
 drivers/nvmem/sprd-efuse.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/nvmem/sprd-efuse.c b/drivers/nvmem/sprd-efuse.c
index 7370f8f9595f..1f6779d3b218 100644
--- a/drivers/nvmem/sprd-efuse.c
+++ b/drivers/nvmem/sprd-efuse.c
@@ -225,7 +225,6 @@ static int sprd_efuse_raw_prog(struct sprd_efuse *efuse, u32 blk, bool doub,
        /* Disable auto-check and data double after programming */
        if (lock)
                sprd_efuse_set_auto_check(efuse, false);
-       sprd_efuse_set_data_double(efuse, false);

        /*
         * Check the efuse error status, if the programming is successful,
@@ -245,6 +244,7 @@ static int sprd_efuse_raw_prog(struct sprd_efuse *efuse, u32 blk, bool doub,
                sprd_efuse_set_prog_lock(efuse, false);
        }

+       sprd_efuse_set_data_double(efuse, false);
        sprd_efuse_set_prog_power(efuse, false);
        writel(0, efuse->base + SPRD_EFUSE_MAGIC_NUM);

--
2.17.1

________________________________
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[PATCH 6/7] nvmem: sprd: Modify block_num and block_offset macro

[Yanxin Huang]

The corresponding efuse block_num and block_offset are different for each
soc, and different block_num and block_offset macros should be defined
depending on the soc.

Therefore, SPRD_EFUSE_NORMAL_BLOCK_NUMS and SPRD_EFUSE_NORMAL_BLOCK_OFFSET
are changed to UMS312_NORMAL_BLOCK_NUMS and UMS312_NORMAL_BLOCK_OFFSET.

Signed-off-by: Yanxin Huang <yanxin.huang@unisoc.com>
---
 drivers/nvmem/sprd-efuse.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/nvmem/sprd-efuse.c b/drivers/nvmem/sprd-efuse.c
index 1f6779d3b218..0dad49935d38 100644
--- a/drivers/nvmem/sprd-efuse.c
+++ b/drivers/nvmem/sprd-efuse.c
@@ -40,8 +40,8 @@
  * and we can only access the normal efuse in kernel. So define the normal
  * block offset index and normal block numbers.
  */
-#define SPRD_EFUSE_NORMAL_BLOCK_NUMS   24
-#define SPRD_EFUSE_NORMAL_BLOCK_OFFSET 72
+#define UMS312_NORMAL_BLOCK_NUMS       24
+#define UMS312_NORMAL_BLOCK_OFFSET     72

 /* Timeout (ms) for the trylock of hardware spinlocks */
 #define SPRD_EFUSE_HWLOCK_TIMEOUT      5000
@@ -70,8 +70,8 @@ struct sprd_efuse {
 };

 static const struct sprd_efuse_variant_data ums312_data = {
-       .blk_nums = SPRD_EFUSE_NORMAL_BLOCK_NUMS,
-       .blk_offset = SPRD_EFUSE_NORMAL_BLOCK_OFFSET,
+       .blk_nums = UMS312_NORMAL_BLOCK_NUMS,
+       .blk_offset = UMS312_NORMAL_BLOCK_OFFSET,
        .blk_double = false,
 };

--
2.17.1

________________________________
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[PATCH 7/7] nvmem: sprd: Add Unisoc Qogirn6lite and UMS512 efuse support

[Yanxin Huang]

This patch adds support for Unisoc UMS512 and Qogirn6lite platform
efuse driver.

Signed-off-by: Yanxin Huang <yanxin.huang@unisoc.com>
---
 drivers/nvmem/sprd-efuse.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/nvmem/sprd-efuse.c b/drivers/nvmem/sprd-efuse.c
index 0dad49935d38..065e6d55e832 100644
--- a/drivers/nvmem/sprd-efuse.c
+++ b/drivers/nvmem/sprd-efuse.c
@@ -42,6 +42,10 @@
  */
 #define UMS312_NORMAL_BLOCK_NUMS       24
 #define UMS312_NORMAL_BLOCK_OFFSET     72
+#define UMS512_NORMAL_BLOCK_NUMS       24
+#define UMS512_NORMAL_BLOCK_OFFSET     72
+#define QogirN6L_NORMAL_BLOCK_NUMS     51
+#define QogirN6L_NORMAL_BLOCK_OFFSET   53

 /* Timeout (ms) for the trylock of hardware spinlocks */
 #define SPRD_EFUSE_HWLOCK_TIMEOUT      5000
@@ -75,6 +79,18 @@ static const struct sprd_efuse_variant_data ums312_data = {
        .blk_double = false,
 };

+static const struct sprd_efuse_variant_data ums512_data = {
+       .blk_nums = UMS512_NORMAL_BLOCK_NUMS,
+       .blk_offset = UMS512_NORMAL_BLOCK_OFFSET,
+       .blk_double = false,
+};
+
+static const struct sprd_efuse_variant_data qogirn6lite_data = {
+       .blk_nums = QogirN6L_NORMAL_BLOCK_NUMS,
+       .blk_offset = QogirN6L_NORMAL_BLOCK_OFFSET,
+       .blk_double = true,
+};
+
 /*
  * On Spreadtrum platform, we have multi-subsystems will access the unique
  * efuse controller, so we need one hardware spinlock to synchronize between
@@ -411,6 +427,8 @@ static int sprd_efuse_probe(struct platform_device *pdev)

 static const struct of_device_id sprd_efuse_of_match[] = {
        { .compatible = "sprd,ums312-efuse", .data = &ums312_data },
+       { .compatible = "sprd,ums512-efuse", .data = &ums512_data },
+       { .compatible = "sprd,qogirn6lite-efuse", .data = &qogirn6lite_data },
        { }
 };

--
2.17.1

________________________________
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本邮件及其附件具有保密性质，受法律保护不得泄露，仅发送给本邮件所指特定收件人。严禁非经授权使用、宣传、发布或复制本邮件或其内容。若非该特定收件人，请勿阅读、复制、 使用或披露本邮件的任何内容。若误收本邮件，请从系统中永久性删除本邮件及所有附件，并以回复邮件的方式即刻告知发件人。无法保证互联网通信及时、安全、无误或防毒。发件人对任何错漏均不承担责任。

Re: [PATCH 2/7] dt-bindings: nvmem: Add compatible for sharkl3, ums512, qogirl6, qogirn6pro, qogirn6lite

[Conor Dooley]

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On Sat, Aug 19, 2023 at 01:51:36PM +0800, Yanxin Huang wrote:

> ________________________________
>  This email (including its attachments) is intended only for the person or entity to which it is addressed and may contain information that is privileged, confidential or otherwise protected from disclosure. Unauthorized use, dissemination, distribution or copying of this email or the information herein or taking any action in reliance on the contents of this email or the information herein, by anyone other than the intended recipient, or an employee or agent responsible for delivering the message to the intended recipient, is strictly prohibited. If you are not the intended recipient, please do not read, copy, use or disclose any part of this e-mail to others. Please notify the sender immediately and permanently delete this e-mail and any attachments if you received it in error. Internet communications cannot be guaranteed to be timely, secure, error-free or virus-free. The sender does not accept liability for any errors or omissions.
> 本邮件及其附件具有保密性质，受法律保护不得泄露，仅发送给本邮件所指特定收件人。严禁非经授权使用、宣传、发布或复制本邮件或其内容。若非该特定收件人，请勿阅读、复制、 使用或披露本邮件的任何内容。若误收本邮件，请从系统中永久性删除本邮件及所有附件，并以回复邮件的方式即刻告知发件人。无法保证互联网通信及时、安全、无误或防毒。发件人对任何错漏均不承担责任。


Please fix your mail system, this is not compatible with kernel
development.

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Re: [PATCH 2/7] dt-bindings: nvmem: Add compatible for sharkl3, ums512, qogirl6, qogirn6pro, qogirn6lite

[Krzysztof Kozlowski]

On 19/08/2023 07:51, Yanxin Huang wrote:
> Added unisoc sharkl3, ums512, qogirl6, qogirn6pro, qogirn6lite platform
> compatible information.
> 
> Signed-off-by: Yanxin Huang <yanxin.huang@unisoc.com>
> ---

Please use scripts/get_maintainers.pl to get a list of necessary people
and lists to CC. It might happen, that command when run on an older
kernel, gives you outdated entries. Therefore please be sure you base
your patches on recent Linux kernel.

You missed at least DT list (maybe more), so this won't be tested by
automated tooling. Performing review on untested code might be a waste
of time, thus I will skip this patch entirely till you follow the
process allowing the patch to be tested.

Please kindly resend and include all necessary To/Cc entries.

Best regards,
Krzysztof