From: Tao Zhang <quic_taozha@quicinc.com>
To: Suzuki K Poulose <suzuki.poulose@arm.com>,
Mathieu Poirier <mathieu.poirier@linaro.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Konrad Dybcio <konradybcio@gmail.com>,
Mike Leach <mike.leach@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Jinlong Mao <quic_jinlmao@quicinc.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
<coresight@lists.linaro.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
Tingwei Zhang <quic_tingweiz@quicinc.com>,
Yuanfang Zhang <quic_yuanfang@quicinc.com>,
Trilok Soni <quic_tsoni@quicinc.com>,
Song Chai <quic_songchai@quicinc.com>,
<linux-arm-msm@vger.kernel.org>, <andersson@kernel.org>
Subject: Re: [PATCH v4 05/10] coresight-tpda: Add support to configure CMB element
Date: Mon, 22 Jan 2024 11:19:34 +0800 [thread overview]
Message-ID: <19790e4c-0217-4ebd-b98a-69f0887ec408@quicinc.com> (raw)
In-Reply-To: <78b998a4-1760-4442-8b49-3aa07271785e@arm.com>
On 1/19/2024 7:47 PM, Suzuki K Poulose wrote:
> On 19/01/2024 03:22, Tao Zhang wrote:
>> Read the CMB element size from the device tree. Set the register
>> bit that controls the CMB element size of the corresponding port.
>>
>> Reviewed-by: James Clark <james.clark@arm.com>
>> Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
>> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
>> ---
>> drivers/hwtracing/coresight/coresight-tpda.c | 123 +++++++++++--------
>> drivers/hwtracing/coresight/coresight-tpda.h | 6 +
>> 2 files changed, 79 insertions(+), 50 deletions(-)
>>
>> diff --git a/drivers/hwtracing/coresight/coresight-tpda.c
>> b/drivers/hwtracing/coresight/coresight-tpda.c
>> index 4ac954f4bc13..987a69428c93 100644
>> --- a/drivers/hwtracing/coresight/coresight-tpda.c
>> +++ b/drivers/hwtracing/coresight/coresight-tpda.c
>> @@ -18,6 +18,7 @@
>> #include "coresight-priv.h"
>> #include "coresight-tpda.h"
>> #include "coresight-trace-id.h"
>> +#include "coresight-tpdm.h"
>> DEFINE_CORESIGHT_DEVLIST(tpda_devs, "tpda");
>> @@ -28,24 +29,57 @@ static bool coresight_device_is_tpdm(struct
>> coresight_device *csdev)
>> CORESIGHT_DEV_SUBTYPE_SOURCE_TPDM);
>> }
>> +static void tpdm_clear_element_size(struct coresight_device *csdev)
>> +{
>> + struct tpda_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
>> +
>> + drvdata->dsb_esize = 0;
>> + drvdata->cmb_esize = 0;
>> +}
>> +
>> +static void tpda_set_element_size(struct tpda_drvdata *drvdata, u32
>> *val)
>> +{
>> +
>> + if (drvdata->dsb_esize == 64)
>> + *val |= TPDA_Pn_CR_DSBSIZE;
>> + else if (drvdata->dsb_esize == 32)
>> + *val &= ~TPDA_Pn_CR_DSBSIZE;
>> +
>> + if (drvdata->cmb_esize == 64)
>> + *val |= FIELD_PREP(TPDA_Pn_CR_CMBSIZE, 0x2);
>> + else if (drvdata->cmb_esize == 32)
>> + *val |= FIELD_PREP(TPDA_Pn_CR_CMBSIZE, 0x1);
>> + else if (drvdata->cmb_esize == 8)
>> + *val &= ~TPDA_Pn_CR_CMBSIZE;
>> +}
>> +
>> /*
>> - * Read the DSB element size from the TPDM device
>> + * Read the element size from the TPDM device. One TPDM must have at
>> least one of the
>> + * element size property.
>> * Returns
>> - * The dsb element size read from the devicetree if available.
>> - * 0 - Otherwise, with a warning once.
>> + * 0 - The element size property is read
>> + * Others - Cannot read the property of the element size
>> */
>> -static int tpdm_read_dsb_element_size(struct coresight_device *csdev)
>> +static int tpdm_read_element_size(struct tpda_drvdata *drvdata,
>> + struct coresight_device *csdev)
>> {
>> - int rc = 0;
>> - u8 size = 0;
>> + int rc = -EINVAL;
>> + struct tpdm_drvdata *tpdm_data =
>> dev_get_drvdata(csdev->dev.parent);
>> +
>> + if (tpdm_has_dsb_dataset(tpdm_data)) {
>> + rc = fwnode_property_read_u8(dev_fwnode(csdev->dev.parent),
>> + "qcom,dsb-element-size", &drvdata->dsb_esize);
>> + }
>> + if (tpdm_has_cmb_dataset(tpdm_data)) {
>> + rc = fwnode_property_read_u8(dev_fwnode(csdev->dev.parent),
>> + "qcom,cmb-element-size", &drvdata->cmb_esize);
>> + }
>> - rc = fwnode_property_read_u8(dev_fwnode(csdev->dev.parent),
>> - "qcom,dsb-element-size", &size);
>> if (rc)
>> dev_warn_once(&csdev->dev,
>> - "Failed to read TPDM DSB Element size: %d\n", rc);
>> + "Failed to read TPDM Element size: %d\n", rc);
>> - return size;
>> + return rc;
>> }
>> /*
>> @@ -56,11 +90,12 @@ static int tpdm_read_dsb_element_size(struct
>> coresight_device *csdev)
>> * Parameter "inport" is used to pass in the input port number
>> * of TPDA, and it is set to -1 in the recursize call.
>> */
>> -static int tpda_get_element_size(struct coresight_device *csdev,
>> +static int tpda_get_element_size(struct tpda_drvdata *drvdata,
>> + struct coresight_device *csdev,
>> int inport)
>> {
>> - int dsb_size = -ENOENT;
>> - int i, size;
>> + int rc = 0;
>> + int i;
>> struct coresight_device *in;
>> for (i = 0; i < csdev->pdata->nr_inconns; i++) {
>> @@ -69,30 +104,26 @@ static int tpda_get_element_size(struct
>> coresight_device *csdev,
>> continue;
>> /* Ignore the paths that do not match port */
>> - if (inport > 0 &&
>> + if (inport >= 0 &&
>> csdev->pdata->in_conns[i]->dest_port != inport)
>> continue;
>> if (coresight_device_is_tpdm(in)) {
>> - size = tpdm_read_dsb_element_size(in);
>> + if ((drvdata->dsb_esize) || (drvdata->cmb_esize))
>> + return -EEXIST;
>> + rc = tpdm_read_element_size(drvdata, in);
>> + if (rc)
>> + return rc;
>> } else {
>> /* Recurse down the path */
>> - size = tpda_get_element_size(in, -1);
>> - }
>> -
>> - if (size < 0)
>> - return size;
>> -
>> - if (dsb_size < 0) {
>> - /* Found a size, save it. */
>> - dsb_size = size;
>> - } else {
>> - /* Found duplicate TPDMs */
>> - return -EEXIST;
>> + rc = tpda_get_element_size(drvdata, in, -1);
>> + if (rc)
>> + return rc;
>> }
>> }
>> - return dsb_size;
>> +
>> + return rc;
>> }
>> /* Settings pre enabling port control register */
>> @@ -109,7 +140,7 @@ static void tpda_enable_pre_port(struct
>> tpda_drvdata *drvdata)
>> static int tpda_enable_port(struct tpda_drvdata *drvdata, int port)
>> {
>> u32 val;
>> - int size;
>> + int rc;
>> val = readl_relaxed(drvdata->base + TPDA_Pn_CR(port));
>> /*
>> @@ -117,29 +148,21 @@ static int tpda_enable_port(struct tpda_drvdata
>> *drvdata, int port)
>> * Set the bit to 0 if the size is 32
>> * Set the bit to 1 if the size is 64
>> */
>> - size = tpda_get_element_size(drvdata->csdev, port);
>> - switch (size) {
>> - case 32:
>> - val &= ~TPDA_Pn_CR_DSBSIZE;
>> - break;
>> - case 64:
>> - val |= TPDA_Pn_CR_DSBSIZE;
>> - break;
>> - case 0:
>> - return -EEXIST;
>> - case -EEXIST:
>> + tpdm_clear_element_size(drvdata->csdev);
>> + rc = tpda_get_element_size(drvdata, drvdata->csdev, port);
>> + if (!rc && ((drvdata->dsb_esize) || (drvdata->cmb_esize))) {
>
> minor nit: Drop unnecessary () around the drvdata member access.
>
> if (!rc && (drvdata->dsb_esize || drvdata->cmb_esize))
Sure, I will update in the next patch series.
>
>> + tpda_set_element_size(drvdata, &val);
>> + /* Enable the port */
>> + val |= TPDA_Pn_CR_ENA;
>> + writel_relaxed(val, drvdata->base + TPDA_Pn_CR(port));
>> + } else if (rc == -EEXIST)
>> dev_warn_once(&drvdata->csdev->dev,
>> - "Detected multiple TPDMs on port %d", -EEXIST);
>> - return -EEXIST;
>> - default:
>> - return -EINVAL;
>> - }
>> -
>> - /* Enable the port */
>> - val |= TPDA_Pn_CR_ENA;
>> - writel_relaxed(val, drvdata->base + TPDA_Pn_CR(port));
>> + "Detected multiple TPDMs on port %d", -EEXIST);
>
> s/-EEXIST/port ?
Sure, I will update in the next patch series.
Best,
Tao
>
> Rest looks fine to me.
>
> Suzuki
>
> _______________________________________________
> CoreSight mailing list -- coresight@lists.linaro.org
> To unsubscribe send an email to coresight-leave@lists.linaro.org
next prev parent reply other threads:[~2024-01-22 3:19 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-19 3:22 [PATCH v4 00/10] Add support to configure TPDM CMB subunit Tao Zhang
2024-01-19 3:22 ` [PATCH v4 01/10] coresight-tpdm: Optimize the store function of tpdm simple dataset Tao Zhang
2024-01-19 3:22 ` [PATCH v4 02/10] coresight-tpdm: Optimize the useage of tpdm_has_dsb_dataset Tao Zhang
2024-01-19 11:35 ` Suzuki K Poulose
2024-01-22 2:23 ` Tao Zhang
2024-01-19 3:22 ` [PATCH v4 03/10] dt-bindings: arm: Add support for CMB element size Tao Zhang
2024-01-22 8:42 ` Krzysztof Kozlowski
2024-01-19 3:22 ` [PATCH v4 04/10] coresight-tpdm: Add CMB dataset support Tao Zhang
2024-01-19 3:22 ` [PATCH v4 05/10] coresight-tpda: Add support to configure CMB element Tao Zhang
2024-01-19 11:47 ` Suzuki K Poulose
2024-01-22 3:19 ` Tao Zhang [this message]
2024-01-19 3:22 ` [PATCH v4 06/10] coresight-tpdm: Add support to configure CMB Tao Zhang
2024-01-19 11:53 ` Suzuki K Poulose
2024-01-22 4:27 ` Tao Zhang
2024-01-19 3:23 ` [PATCH v4 07/10] coresight-tpdm: Add pattern registers support for CMB Tao Zhang
2024-01-19 11:58 ` Suzuki K Poulose
2024-01-22 4:33 ` Tao Zhang
2024-01-19 3:23 ` [PATCH v4 08/10] coresight-tpdm: Add timestamp control register support for the CMB Tao Zhang
2024-01-24 12:07 ` Suzuki K Poulose
2024-01-25 10:07 ` Tao Zhang
2024-01-19 3:23 ` [PATCH v4 09/10] dt-bindings: arm: Add support for TPDM CMB MSR register Tao Zhang
2024-01-22 8:44 ` Krzysztof Kozlowski
2024-01-19 3:23 ` [PATCH v4 10/10] coresight-tpdm: Add msr register support for CMB Tao Zhang
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