From: Tao Zhang <quic_taozha@quicinc.com>
To: Suzuki K Poulose <suzuki.poulose@arm.com>,
Mathieu Poirier <mathieu.poirier@linaro.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Konrad Dybcio <konradybcio@gmail.com>,
Mike Leach <mike.leach@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Jinlong Mao <quic_jinlmao@quicinc.com>,
Leo Yan <leo.yan@linaro.org>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
<coresight@lists.linaro.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
Tingwei Zhang <quic_tingweiz@quicinc.com>,
Yuanfang Zhang <quic_yuanfang@quicinc.com>,
Trilok Soni <quic_tsoni@quicinc.com>,
Song Chai <quic_songchai@quicinc.com>,
<linux-arm-msm@vger.kernel.org>, <andersson@kernel.org>
Subject: Re: [PATCH v4 02/10] coresight-tpdm: Optimize the useage of tpdm_has_dsb_dataset
Date: Mon, 22 Jan 2024 10:23:24 +0800 [thread overview]
Message-ID: <c95f8a05-ed8c-4d41-9bc6-7276b2508306@quicinc.com> (raw)
In-Reply-To: <3cd64a92-594d-483e-b134-a45f57d318f6@arm.com>
On 1/19/2024 7:35 PM, Suzuki K Poulose wrote:
> On 19/01/2024 03:22, Tao Zhang wrote:
>> Since the function tpdm_has_dsb_dataset will be called by TPDA
>> driver in subsequent patches, it is moved to the header file.
>> And move this judgement form the function __tpdm_{enable/disable}
>> to the beginning of the function tpdm_{enable/disable}_dsb.
>>
>> Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
>> ---
>> drivers/hwtracing/coresight/coresight-tpdm.c | 82 ++++++++++----------
>> drivers/hwtracing/coresight/coresight-tpdm.h | 4 +
>> 2 files changed, 43 insertions(+), 43 deletions(-)
>>
>> diff --git a/drivers/hwtracing/coresight/coresight-tpdm.c
>> b/drivers/hwtracing/coresight/coresight-tpdm.c
>> index 0427c0fc0bf3..6549f71ba150 100644
>> --- a/drivers/hwtracing/coresight/coresight-tpdm.c
>> +++ b/drivers/hwtracing/coresight/coresight-tpdm.c
>> @@ -125,11 +125,6 @@ static ssize_t tpdm_simple_dataset_store(struct
>> device *dev,
>> return ret;
>> }
>> -static bool tpdm_has_dsb_dataset(struct tpdm_drvdata *drvdata)
>> -{
>> - return (drvdata->datasets & TPDM_PIDR0_DS_DSB);
>> -}
>> -
>> static umode_t tpdm_dsb_is_visible(struct kobject *kobj,
>> struct attribute *attr, int n)
>> {
>> @@ -232,38 +227,39 @@ static void tpdm_enable_dsb(struct tpdm_drvdata
>> *drvdata)
>> {
>> u32 val, i;
>> - for (i = 0; i < TPDM_DSB_MAX_EDCR; i++)
>> - writel_relaxed(drvdata->dsb->edge_ctrl[i],
>> - drvdata->base + TPDM_DSB_EDCR(i));
>> - for (i = 0; i < TPDM_DSB_MAX_EDCMR; i++)
>> - writel_relaxed(drvdata->dsb->edge_ctrl_mask[i],
>> - drvdata->base + TPDM_DSB_EDCMR(i));
>> - for (i = 0; i < TPDM_DSB_MAX_PATT; i++) {
>> - writel_relaxed(drvdata->dsb->patt_val[i],
>> - drvdata->base + TPDM_DSB_TPR(i));
>> - writel_relaxed(drvdata->dsb->patt_mask[i],
>> - drvdata->base + TPDM_DSB_TPMR(i));
>> - writel_relaxed(drvdata->dsb->trig_patt[i],
>> - drvdata->base + TPDM_DSB_XPR(i));
>> - writel_relaxed(drvdata->dsb->trig_patt_mask[i],
>> - drvdata->base + TPDM_DSB_XPMR(i));
>> - }
>> -
>> - set_dsb_tier(drvdata);
>> + if (tpdm_has_dsb_dataset(drvdata)) {
>
> Minor nit: If you do :
>
> if (!tpdm_has_dsb_dataset(drvdata))
> return;
>
> You don't need any of these additional churns of moving them.
Sure，I will update in the next patch series.
>
>> + for (i = 0; i < TPDM_DSB_MAX_EDCR; i++)
>> + writel_relaxed(drvdata->dsb->edge_ctrl[i],
>> + drvdata->base + TPDM_DSB_EDCR(i));
>> + for (i = 0; i < TPDM_DSB_MAX_EDCMR; i++)
>> + writel_relaxed(drvdata->dsb->edge_ctrl_mask[i],
>> + drvdata->base + TPDM_DSB_EDCMR(i));
>> + for (i = 0; i < TPDM_DSB_MAX_PATT; i++) {
>> + writel_relaxed(drvdata->dsb->patt_val[i],
>> + drvdata->base + TPDM_DSB_TPR(i));
>> + writel_relaxed(drvdata->dsb->patt_mask[i],
>> + drvdata->base + TPDM_DSB_TPMR(i));
>> + writel_relaxed(drvdata->dsb->trig_patt[i],
>> + drvdata->base + TPDM_DSB_XPR(i));
>> + writel_relaxed(drvdata->dsb->trig_patt_mask[i],
>> + drvdata->base + TPDM_DSB_XPMR(i));
>> + }
>> - set_dsb_msr(drvdata);
>> + set_dsb_tier(drvdata);
>> + set_dsb_msr(drvdata);
>> - val = readl_relaxed(drvdata->base + TPDM_DSB_CR);
>> - /* Set the mode of DSB dataset */
>> - set_dsb_mode(drvdata, &val);
>> - /* Set trigger type */
>> - if (drvdata->dsb->trig_type)
>> - val |= TPDM_DSB_CR_TRIG_TYPE;
>> - else
>> - val &= ~TPDM_DSB_CR_TRIG_TYPE;
>> - /* Set the enable bit of DSB control register to 1 */
>> - val |= TPDM_DSB_CR_ENA;
>> - writel_relaxed(val, drvdata->base + TPDM_DSB_CR);
>> + val = readl_relaxed(drvdata->base + TPDM_DSB_CR);
>> + /* Set the mode of DSB dataset */
>> + set_dsb_mode(drvdata, &val);
>> + /* Set trigger type */
>> + if (drvdata->dsb->trig_type)
>> + val |= TPDM_DSB_CR_TRIG_TYPE;
>> + else
>> + val &= ~TPDM_DSB_CR_TRIG_TYPE;
>> + /* Set the enable bit of DSB control register to 1 */
>> + val |= TPDM_DSB_CR_ENA;
>> + writel_relaxed(val, drvdata->base + TPDM_DSB_CR);
>> + }
>> }
>> /*
>> @@ -278,8 +274,7 @@ static void __tpdm_enable(struct tpdm_drvdata
>> *drvdata)
>> {
>> CS_UNLOCK(drvdata->base);
>> - if (tpdm_has_dsb_dataset(drvdata))
>> - tpdm_enable_dsb(drvdata);
>> + tpdm_enable_dsb(drvdata);
>> CS_LOCK(drvdata->base);
>> }
>> @@ -307,10 +302,12 @@ static void tpdm_disable_dsb(struct
>> tpdm_drvdata *drvdata)
>> {
>> u32 val;
>> - /* Set the enable bit of DSB control register to 0 */
>> - val = readl_relaxed(drvdata->base + TPDM_DSB_CR);
>> - val &= ~TPDM_DSB_CR_ENA;
>> - writel_relaxed(val, drvdata->base + TPDM_DSB_CR);
>> + if (tpdm_has_dsb_dataset(drvdata)) {
>> + /* Set the enable bit of DSB control register to 0 */
>> + val = readl_relaxed(drvdata->base + TPDM_DSB_CR);
>> + val &= ~TPDM_DSB_CR_ENA;
>> + writel_relaxed(val, drvdata->base + TPDM_DSB_CR);
>> + }
>
> Same suggestion as above:
>
> if (!tpdm_has...)
> return;
>
Sure，I will update in the next patch series.
Best,
Tao
>
>> }
>> /* TPDM disable operations */
>> @@ -318,8 +315,7 @@ static void __tpdm_disable(struct tpdm_drvdata
>> *drvdata)
>> {
>> CS_UNLOCK(drvdata->base);
>> - if (tpdm_has_dsb_dataset(drvdata))
>> - tpdm_disable_dsb(drvdata);
>> + tpdm_disable_dsb(drvdata);
>> CS_LOCK(drvdata->base);
>> }
>> diff --git a/drivers/hwtracing/coresight/coresight-tpdm.h
>> b/drivers/hwtracing/coresight/coresight-tpdm.h
>> index 4115b2a17b8d..ddaf333fa1c2 100644
>> --- a/drivers/hwtracing/coresight/coresight-tpdm.h
>> +++ b/drivers/hwtracing/coresight/coresight-tpdm.h
>> @@ -220,4 +220,8 @@ struct tpdm_dataset_attribute {
>> u32 idx;
>> };
>> +static bool tpdm_has_dsb_dataset(struct tpdm_drvdata *drvdata)
>> +{
>> + return (drvdata->datasets & TPDM_PIDR0_DS_DSB);
>> +}
>> #endif /* _CORESIGHT_CORESIGHT_TPDM_H */
>
>
> Suzuki
next prev parent reply other threads:[~2024-01-22 2:24 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-19 3:22 [PATCH v4 00/10] Add support to configure TPDM CMB subunit Tao Zhang
2024-01-19 3:22 ` [PATCH v4 01/10] coresight-tpdm: Optimize the store function of tpdm simple dataset Tao Zhang
2024-01-19 3:22 ` [PATCH v4 02/10] coresight-tpdm: Optimize the useage of tpdm_has_dsb_dataset Tao Zhang
2024-01-19 11:35 ` Suzuki K Poulose
2024-01-22 2:23 ` Tao Zhang [this message]
2024-01-19 3:22 ` [PATCH v4 03/10] dt-bindings: arm: Add support for CMB element size Tao Zhang
2024-01-22 8:42 ` Krzysztof Kozlowski
2024-01-19 3:22 ` [PATCH v4 04/10] coresight-tpdm: Add CMB dataset support Tao Zhang
2024-01-19 3:22 ` [PATCH v4 05/10] coresight-tpda: Add support to configure CMB element Tao Zhang
2024-01-19 11:47 ` Suzuki K Poulose
2024-01-22 3:19 ` Tao Zhang
2024-01-19 3:22 ` [PATCH v4 06/10] coresight-tpdm: Add support to configure CMB Tao Zhang
2024-01-19 11:53 ` Suzuki K Poulose
2024-01-22 4:27 ` Tao Zhang
2024-01-19 3:23 ` [PATCH v4 07/10] coresight-tpdm: Add pattern registers support for CMB Tao Zhang
2024-01-19 11:58 ` Suzuki K Poulose
2024-01-22 4:33 ` Tao Zhang
2024-01-19 3:23 ` [PATCH v4 08/10] coresight-tpdm: Add timestamp control register support for the CMB Tao Zhang
2024-01-24 12:07 ` Suzuki K Poulose
2024-01-25 10:07 ` Tao Zhang
2024-01-19 3:23 ` [PATCH v4 09/10] dt-bindings: arm: Add support for TPDM CMB MSR register Tao Zhang
2024-01-22 8:44 ` Krzysztof Kozlowski
2024-01-19 3:23 ` [PATCH v4 10/10] coresight-tpdm: Add msr register support for CMB Tao Zhang
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