From: "Chang S. Bae" <chang.seok.bae@intel.com>
To: <linux-kernel@vger.kernel.org>
Cc: <x86@kernel.org>, <tglx@kernel.org>, <mingo@redhat.com>,
<bp@alien8.de>, <dave.hansen@linux.intel.com>,
<peterz@infradead.org>, <david.kaplan@amd.com>
Subject: Re: [PATCH v4 8/9] x86/nmi: Simplify offline microcode handler invocation
Date: Wed, 4 Nov 2026 13:56:31 -0800 [thread overview]
Message-ID: <1994d38c-6944-451c-8416-7be4859e2ecb@intel.com> (raw)
In-Reply-To: <20261104182322.578066-9-chang.seok.bae@intel.com>
On 11/4/2026 10:23 AM, Chang S. Bae wrote:
>
> diff --git a/arch/x86/kernel/nmi.c b/arch/x86/kernel/nmi.c
> index e3660b8b8f38..11c965445bdc 100644
> --- a/arch/x86/kernel/nmi.c
> +++ b/arch/x86/kernel/nmi.c
> @@ -553,7 +553,7 @@ DEFINE_IDTENTRY_RAW(exc_nmi)
> raw_atomic_long_inc(&nsp->idt_calls);
>
> if (arch_cpu_is_offline(smp_processor_id())) {
> - if (microcode_nmi_handler_enabled())
> + if (IS_ENABLED(CONFIG_MICROCODE_LATE_LOADING))
> microcode_offline_nmi_handler();
> return;
> }
> @@ -715,7 +715,7 @@ DEFINE_FREDENTRY_NMI(exc_nmi)
> irqentry_state_t irq_state;
>
> if (arch_cpu_is_offline(smp_processor_id())) {
> - if (microcode_nmi_handler_enabled())
> + if (IS_ENABLED(CONFIG_MICROCODE_LATE_LOADING))
> microcode_offline_nmi_handler();
> return;
> }
There is a Sashiko comment on this:
https://sashiko.dev/#/patchset/20261104182322.578066-1-chang.seok.bae%40intel.com
I thought waking up soft-offlined SMT siblings with an NMI was benign.
Right now the path is not explicitly gated by the use_nmi flag even
though the underlying mechanism is NMI-based.
So perhaps it's better to have this reassurance ahead:
diff --git a/arch/x86/kernel/cpu/microcode/core.c
b/arch/x86/kernel/cpu/microcode/core.c
index 330c62f6dd32..cf3c02622dc1 100644
--- a/arch/x86/kernel/cpu/microcode/core.c
+++ b/arch/x86/kernel/cpu/microcode/core.c
@@ -502,8 +502,11 @@ static void load_primary(unsigned int cpu)
unsigned int nr_offl = cpumask_weight(&cpu_offline_mask);
bool proceed = true;
- /* Kick soft-offlined SMT siblings if required */
- if (!cpu && nr_offl)
+ /*
+ * Kick soft-offlined SMT siblings if required.
+ * Note the mechanism is NMI base.
+ */
+ if (microcode_ops->use_nmi && !cpu && nr_offl)
proceed = kick_offline_cpus(nr_offl);
/* If the soft-offlined CPUs did not respond, abort */
@@ -511,7 +514,7 @@ static void load_primary(unsigned int cpu)
__load_primary(cpu);
/* Unconditionally release soft-offlined SMT siblings if
required */
- if (!cpu && nr_offl)
+ if (microcode_ops->use_nmi && !cpu && nr_offl)
release_offline_cpus();
}
Thanks,
Chang
next prev parent reply other threads:[~2026-11-04 21:56 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-04 18:23 [PATCH v4 0/9] x86/microcode: Refactor NMI-based rendezvous mechanism to stop-machine Chang S. Bae
2026-11-04 18:23 ` [PATCH v4 1/9] stop_machine: Refactor multi-CPU stop glue code Chang S. Bae
2026-11-04 18:23 ` [PATCH v4 2/9] stop_machine: Add NMI-based execution path Chang S. Bae
2026-11-04 18:23 ` [PATCH v4 3/9] stop_machine: Introduce stop_machine_nmi_cpuslocked() Chang S. Bae
2026-11-04 18:23 ` [PATCH v4 4/9] x86/apic: Implement self-NMI support Chang S. Bae
2026-11-04 18:23 ` [PATCH v4 5/9] x86/nmi: Support NMI stop-machine handler Chang S. Bae
2026-11-04 18:23 ` [PATCH v4 6/9] x86/microcode: Distinguish NMI control path on stop-machine callback Chang S. Bae
2026-11-04 18:23 ` [PATCH v4 7/9] x86/microcode: Use stop-machine NMI facility Chang S. Bae
2026-11-04 18:23 ` [PATCH v4 8/9] x86/nmi: Simplify offline microcode handler invocation Chang S. Bae
2026-11-04 21:56 ` Chang S. Bae [this message]
2026-11-04 18:23 ` [PATCH v4 9/9] x86/microcode: Remove microcode_nmi_handler_enable Chang S. Bae
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