From: Michal Simek <monstr@monstr.eu>
To: Geert Uytterhoeven <geert+renesas@glider.be>,
Russell King <linux@armlinux.org.uk>,
Arnd Bergmann <arnd@arndb.de>
Cc: linux-arm-kernel@lists.infradead.org, linux-arch@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 4/4] microblaze: Remove support for gcc < 4
Date: Thu, 11 Feb 2021 18:55:30 +0100 [thread overview]
Message-ID: <1b072177-e212-67ce-7d72-c3d526a480f9@monstr.eu> (raw)
In-Reply-To: <20210210141140.1506212-5-geert+renesas@glider.be>
On 2/10/21 3:11 PM, Geert Uytterhoeven wrote:
> Since commit cafa0010cd51fb71 ("Raise the minimum required gcc version
> to 4.6") , the kernel can no longer be compiled using gcc-3.
> Hence drop support code for gcc-3.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> arch/microblaze/kernel/module.c | 26 --------------------------
> 1 file changed, 26 deletions(-)
>
> diff --git a/arch/microblaze/kernel/module.c b/arch/microblaze/kernel/module.c
> index 9f12e3c2bb42a319..e5db3a57b9e30d9e 100644
> --- a/arch/microblaze/kernel/module.c
> +++ b/arch/microblaze/kernel/module.c
> @@ -24,9 +24,6 @@ int apply_relocate_add(Elf32_Shdr *sechdrs, const char *strtab,
> Elf32_Sym *sym;
> unsigned long int *location;
> unsigned long int value;
> -#if __GNUC__ < 4
> - unsigned long int old_value;
> -#endif
>
> pr_debug("Applying add relocation section %u to %u\n",
> relsec, sechdrs[relsec].sh_info);
> @@ -49,40 +46,17 @@ int apply_relocate_add(Elf32_Shdr *sechdrs, const char *strtab,
> */
>
> case R_MICROBLAZE_32:
> -#if __GNUC__ < 4
> - old_value = *location;
> - *location = value + old_value;
> -
> - pr_debug("R_MICROBLAZE_32 (%08lx->%08lx)\n",
> - old_value, value);
> -#else
> *location = value;
> -#endif
> break;
>
> case R_MICROBLAZE_64:
> -#if __GNUC__ < 4
> - /* Split relocs only required/used pre gcc4.1.1 */
> - old_value = ((location[0] & 0x0000FFFF) << 16) |
> - (location[1] & 0x0000FFFF);
> - value += old_value;
> -#endif
> location[0] = (location[0] & 0xFFFF0000) |
> (value >> 16);
> location[1] = (location[1] & 0xFFFF0000) |
> (value & 0xFFFF);
> -#if __GNUC__ < 4
> - pr_debug("R_MICROBLAZE_64 (%08lx->%08lx)\n",
> - old_value, value);
> -#endif
> break;
>
> case R_MICROBLAZE_64_PCREL:
> -#if __GNUC__ < 4
> - old_value = (location[0] & 0xFFFF) << 16 |
> - (location[1] & 0xFFFF);
> - value -= old_value;
> -#endif
> value -= (unsigned long int)(location) + 4;
> location[0] = (location[0] & 0xFFFF0000) |
> (value >> 16);
>
Applied.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
prev parent reply other threads:[~2021-02-11 18:31 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-10 14:11 [PATCH 0/4] Remove checks " Geert Uytterhoeven
2021-02-10 14:11 ` [PATCH 1/4] ARM: div64: Remove always-true __div64_const32_is_OK() duplicate Geert Uytterhoeven
2021-02-10 14:11 ` [PATCH 2/4] ARM: unified: Remove check for gcc < 4 Geert Uytterhoeven
2021-02-10 14:11 ` [PATCH 3/4] asm-generic: div64: Remove always-true __div64_const32_is_OK() Geert Uytterhoeven
2021-02-10 15:11 ` Arnd Bergmann
2021-02-10 14:11 ` [PATCH 4/4] microblaze: Remove support for gcc < 4 Geert Uytterhoeven
2021-02-11 17:55 ` Michal Simek [this message]
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