From: Santhosh Kumar K <s-k6@ti.com>
To: "Miquel Raynal (Schneider Electric)" <miquel.raynal@bootlin.com>,
"Mark Brown" <broonie@kernel.org>, Rob Herring <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
"Geert Uytterhoeven" <geert+renesas@glider.be>,
Magnus Damm <magnus.damm@gmail.com>,
Vaishnav Achath <vaishnav.a@ti.com>
Cc: "Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
"Hervé Codina" <herve.codina@bootlin.com>,
"Wolfram Sang" <wsa+renesas@sang-engineering.com>,
"Vignesh Raghavendra" <vigneshr@ti.com>,
"Pratyush Yadav" <pratyush@kernel.org>,
"Pascal Eberhard" <pascal.eberhard@se.com>,
linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
s-k6@ti.com
Subject: Re: [PATCH v4 00/15] spi: cadence-qspi: Add Renesas RZ/N1 support
Date: Thu, 29 Jan 2026 00:26:00 +0530 [thread overview]
Message-ID: <1b9569c6-5073-439d-b0b3-99a5a40841f6@ti.com> (raw)
In-Reply-To: <20260122-schneider-6-19-rc1-qspi-v4-0-f9c21419a3e6@bootlin.com>
Hello Miquel,
On 22/01/26 20:43, Miquel Raynal (Schneider Electric) wrote:
> Hello,
>
> This series adds support for the QSPI controller available on Renesas
> RZ/N1S and RZ/N1D SoC. It has been tested with a custom board (see last
> SPI patch for details), but has been tested by Wolfram (thank you!) on
> the DB board.
> Link: https://lore.kernel.org/linux-devicetree/20260116114852.52948-2-wsa+renesas@sang-engineering.com/
>
> Adding support for this SoC required a few adaptations in the Cadence
> QSPI driver. The bulk of the work is in the few last patches. Everything
> else is just misc style fixes and improvements which bothered me while I
> was wandering.
>
> In order to support all constraints, I sometimes used a new quirk (for
> the write protection feature and the "no indirect mode"), and sometimes
> used the compatible directly. The ones I thought might not be RZ/N1
> specific have been implemented under the form of a quirk, in order to
> ease their reuse. The other adaptations, which I believe are more
> Renesas specific, have been handled using the compatible. This is all
> very arbitrary, and can be discussed.
>
> Thanks,
> Miquèl
>
> Signed-off-by: Miquel Raynal (Schneider Electric) <miquel.raynal@bootlin.com>
Thank you for the series!
Tested it on TI's AM62A SK (OSPI NAND flash) and
AM62P SK (OSPI NOR flash).
Tested-by: Santhosh Kumar K <s-k6@ti.com>
> ---
> Changes in v4:
> - Drop two binding patches judged useless.
> - Collected Rob's acks.
> - Fixed the RZ/N1D400 DTSI (removed the properties no longer relevant
> after my binding changes).
> - Link to v3: https://lore.kernel.org/r/20260121-schneider-6-19-rc1-qspi-v3-0-43e70fab4444@bootlin.com
>
> Changes in v3:
> - Collected tags from Wolfram and Geert.
> - Dropped the Cadence compatible as this fallback would simply not work
> alone.
> - Fixed the clock issue reported by Santhosh.
> - Fixed the DT snippet following the discussion with Geert.
> - Modified more deeply the binding, to no longer expect a fifo
> size/depth nor any trigger address, as these values have no meaning in
> the score of the Renesas implementation.
> - Link to v2: https://lore.kernel.org/r/20260115-schneider-6-19-rc1-qspi-v2-0-7e6a06e1e17b@bootlin.com
>
> Changes in v2:
> - Fix commit log of DT binding patch, following Krzysztof's comment.
> - Fix properties order in DTSI.
> - Rebase on top of spi/for-next and fix all conflicts.
> - Simplify even further the code in the cleanup patches following
> Pratyush's advices.
> - Link to v1: https://lore.kernel.org/r/20251219-schneider-6-19-rc1-qspi-v1-0-8ad505173e44@bootlin.com
>
> ---
> Miquel Raynal (Schneider Electric) (15):
> spi: dt-bindings: cdns,qspi-nor: Drop label in example
> spi: dt-bindings: cdns,qspi-nor: Add Renesas RZ/N1D400 to the list
> spi: cadence-qspi: Align definitions
> spi: cadence-qspi: Fix style and improve readability
> spi: cadence-qspi: Fix ORing style and alignments
> spi: cadence-qspi: Remove an useless operation
> spi: cadence-qspi: Make sure we filter out unsupported ops
> spi: cadence-qspi: Fix probe error path and remove
> spi: cadence-qspi: Try hard to disable the clocks
> spi: cadence-qspi: Kill cqspi_jh7110_clk_init
> spi: cadence-qspi: Add a flag for controllers without indirect access support
> spi: cadence-qspi: Make sure write protection is disabled
> spi: cadence-qspi: Use a default value for cdns,fifo-width
> spi: cadence-qspi: Add support for the Renesas RZ/N1 controller
> ARM: dts: r9a06g032: Describe the QSPI controller
>
> .../devicetree/bindings/spi/cdns,qspi-nor.yaml | 35 ++-
> arch/arm/boot/dts/renesas/r9a06g032.dtsi | 12 +
> drivers/spi/spi-cadence-quadspi.c | 279 ++++++++++-----------
> 3 files changed, 177 insertions(+), 149 deletions(-)
> ---
> base-commit: 7a3f3fdb79a26125b38fb91b68dab298ca7b44e0
> change-id: 20251219-schneider-6-19-rc1-qspi-7c3e1547af6d
>
> Best regards,
next prev parent reply other threads:[~2026-01-28 18:56 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-22 15:13 Miquel Raynal (Schneider Electric)
2026-01-22 15:13 ` [PATCH v4 01/15] spi: dt-bindings: cdns,qspi-nor: Drop label in example Miquel Raynal (Schneider Electric)
2026-01-22 15:13 ` [PATCH v4 02/15] spi: dt-bindings: cdns,qspi-nor: Add Renesas RZ/N1D400 to the list Miquel Raynal (Schneider Electric)
2026-01-28 20:38 ` Mark Brown
2026-01-22 15:13 ` [PATCH v4 03/15] spi: cadence-qspi: Align definitions Miquel Raynal (Schneider Electric)
2026-01-22 15:13 ` [PATCH v4 04/15] spi: cadence-qspi: Fix style and improve readability Miquel Raynal (Schneider Electric)
2026-01-22 15:13 ` [PATCH v4 05/15] spi: cadence-qspi: Fix ORing style and alignments Miquel Raynal (Schneider Electric)
2026-01-22 15:13 ` [PATCH v4 06/15] spi: cadence-qspi: Remove an useless operation Miquel Raynal (Schneider Electric)
2026-01-22 15:13 ` [PATCH v4 07/15] spi: cadence-qspi: Make sure we filter out unsupported ops Miquel Raynal (Schneider Electric)
2026-01-22 15:13 ` [PATCH v4 08/15] spi: cadence-qspi: Fix probe error path and remove Miquel Raynal (Schneider Electric)
2026-01-22 15:13 ` [PATCH v4 09/15] spi: cadence-qspi: Try hard to disable the clocks Miquel Raynal (Schneider Electric)
2026-01-22 15:13 ` [PATCH v4 10/15] spi: cadence-qspi: Kill cqspi_jh7110_clk_init Miquel Raynal (Schneider Electric)
2026-01-28 20:41 ` Mark Brown
2026-01-22 15:13 ` [PATCH v4 11/15] spi: cadence-qspi: Add a flag for controllers without indirect access support Miquel Raynal (Schneider Electric)
2026-01-22 15:13 ` [PATCH v4 12/15] spi: cadence-qspi: Make sure write protection is disabled Miquel Raynal (Schneider Electric)
2026-01-22 15:13 ` [PATCH v4 13/15] spi: cadence-qspi: Use a default value for cdns,fifo-width Miquel Raynal (Schneider Electric)
2026-01-22 15:13 ` [PATCH v4 14/15] spi: cadence-qspi: Add support for the Renesas RZ/N1 controller Miquel Raynal (Schneider Electric)
2026-01-29 13:44 ` Geert Uytterhoeven
2026-01-29 19:27 ` Miquel Raynal
2026-01-22 15:13 ` [PATCH v4 15/15] ARM: dts: r9a06g032: Describe the QSPI controller Miquel Raynal (Schneider Electric)
2026-01-28 18:56 ` Santhosh Kumar K [this message]
2026-01-29 11:13 ` (subset) [PATCH v4 00/15] spi: cadence-qspi: Add Renesas RZ/N1 support Mark Brown
2026-02-05 9:16 ` Miquel Raynal
2026-02-05 11:15 ` Mark Brown
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1b9569c6-5073-439d-b0b3-99a5a40841f6@ti.com \
--to=s-k6@ti.com \
--cc=broonie@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=geert+renesas@glider.be \
--cc=herve.codina@bootlin.com \
--cc=krzk+dt@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-renesas-soc@vger.kernel.org \
--cc=linux-spi@vger.kernel.org \
--cc=magnus.damm@gmail.com \
--cc=miquel.raynal@bootlin.com \
--cc=pascal.eberhard@se.com \
--cc=pratyush@kernel.org \
--cc=robh@kernel.org \
--cc=thomas.petazzoni@bootlin.com \
--cc=vaishnav.a@ti.com \
--cc=vigneshr@ti.com \
--cc=wsa+renesas@sang-engineering.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®