* Re: [PATCH v18 03/10] soc: mediatek: add mtk-mmsys support for mt8195 vdosys0
2022-04-13 6:07 ` [PATCH v18 03/10] soc: mediatek: add mtk-mmsys support for mt8195 vdosys0 Dan Carpenter
@ 2022-04-13 8:43 ` Jason-JH Lin
0 siblings, 0 replies; 2+ messages in thread
From: Jason-JH Lin @ 2022-04-13 8:43 UTC (permalink / raw)
To: Dan Carpenter, kbuild, Rob Herring, Krzysztof Kozlowski,
Matthias Brugger, Chun-Kuang Hu, AngeloGioacchino Del Regno
Cc: lkp, kbuild-all, fshao, David Airlie, singo.chang, dri-devel,
Fabien Parent, linux-stm32, roy-cw.yeh,
Project_Global_Chrome_Upstream_Group, Yongqiang Niu, Rex-BC Chen,
devicetree, nancy.lin, linux-mediatek, hsinyi, linux-arm-kernel,
linux-kernel, moudy.ho, Maxime Coquelin
Hi Dan,
Thanks for the reviews.
On Wed, 2022-04-13 at 09:07 +0300, Dan Carpenter wrote:
> Hi "jason-jh.lin",
>
> url:
> https://urldefense.com/v3/__https://github.com/intel-lab-lkp/linux/commits/jason-jh-lin/Add-Mediatek-Soc-DRM-vdosys0-support-for-mt8195/20220412-183359__;!!CTRNKA9wMg0ARbw!wAjdEcyQM5SvYaLtDA1d-7DTP-0V0x2EYmyKkpr3QDeGXEknO3vUGir-oiGEYodb6RAr$
>
> base: git://anongit.freedesktop.org/drm/drm drm-next
> config: arc-randconfig-m031-20220411 (
> https://urldefense.com/v3/__https://download.01.org/0day-ci/archive/20220413/202204130935.urqkcDrG-lkp@intel.com/config__;!!CTRNKA9wMg0ARbw!wAjdEcyQM5SvYaLtDA1d-7DTP-0V0x2EYmyKkpr3QDeGXEknO3vUGir-oiGEYvQ-IvSq$
> )
> compiler: arc-elf-gcc (GCC) 11.2.0
>
> If you fix the issue, kindly add following tag as appropriate
> Reported-by: kernel test robot <lkp@intel.com>
> Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
>
> smatch warnings:
> drivers/soc/mediatek/mtk-mmsys.c:315 mtk_mmsys_probe() warn: passing
> zero to 'PTR_ERR'
>
> vim +/PTR_ERR +315 drivers/soc/mediatek/mtk-mmsys.c
>
> 13032709e23285 Matthias Brugger 2020-03-25 281 static int
> mtk_mmsys_probe(struct platform_device *pdev)
> 13032709e23285 Matthias Brugger 2020-03-25 282 {
> 2c758e301ed95a Enric Balletbo i Serra 2020-03-25 283 struct
> device *dev = &pdev->dev;
> 13032709e23285 Matthias Brugger 2020-03-25 284 struct
> platform_device *clks;
> 667c769246b01c Enric Balletbo i Serra 2020-03-25 285 struct
> platform_device *drm;
> 8cfc54a36d3e79 jason-jh.lin 2022-04-12 286 const
> struct mtk_mmsys_match_data *match_data;
> ce15e7faa2fc54 CK Hu 2021-03-17 287 struct
> mtk_mmsys *mmsys;
> 8cfc54a36d3e79 jason-jh.lin 2022-04-12 288 struct
> resource *res;
> 2c758e301ed95a Enric Balletbo i Serra 2020-03-25 289 int
> ret;
> 2c758e301ed95a Enric Balletbo i Serra 2020-03-25 290
> ce15e7faa2fc54 CK Hu 2021-03-17 291 mmsys =
> devm_kzalloc(dev, sizeof(*mmsys), GFP_KERNEL);
> ce15e7faa2fc54 CK Hu 2021-03-17 292 if
> (!mmsys)
> ce15e7faa2fc54 CK Hu 2021-03-17 293
> return -ENOMEM;
> ce15e7faa2fc54 CK Hu 2021-03-17 294
> ce15e7faa2fc54 CK Hu 2021-03-17 295 mmsys-
> >regs = devm_platform_ioremap_resource(pdev, 0);
> ce15e7faa2fc54 CK Hu 2021-03-17 296 if
> (IS_ERR(mmsys->regs)) {
> ce15e7faa2fc54 CK Hu 2021-03-17 297
> ret = PTR_ERR(mmsys->regs);
> cc6576029aedc7 Enric Balletbo i Serra 2020-10-06 298
> dev_err(dev, "Failed to ioremap mmsys registers: %d\n", ret);
> 2c758e301ed95a Enric Balletbo i Serra 2020-03-25 299
> return ret;
> 2c758e301ed95a Enric Balletbo i Serra 2020-03-25 300 }
> 2c758e301ed95a Enric Balletbo i Serra 2020-03-25 301
> f27ef2856343e2 Enric Balletbo i Serra 2021-09-30 302 spin_lo
> ck_init(&mmsys->lock);
> f27ef2856343e2 Enric Balletbo i Serra 2021-09-30 303
> f27ef2856343e2 Enric Balletbo i Serra 2021-09-30 304 mmsys-
> >rcdev.owner = THIS_MODULE;
> f27ef2856343e2 Enric Balletbo i Serra 2021-09-30 305 mmsys-
> >rcdev.nr_resets = 32;
> f27ef2856343e2 Enric Balletbo i Serra 2021-09-30 306 mmsys-
> >rcdev.ops = &mtk_mmsys_reset_ops;
> f27ef2856343e2 Enric Balletbo i Serra 2021-09-30 307 mmsys-
> >rcdev.of_node = pdev->dev.of_node;
> f27ef2856343e2 Enric Balletbo i Serra 2021-09-30 308 ret =
> devm_reset_controller_register(&pdev->dev, &mmsys->rcdev);
> f27ef2856343e2 Enric Balletbo i Serra 2021-09-30 309 if
> (ret) {
> f27ef2856343e2 Enric Balletbo i Serra 2021-09-30 310
> dev_err(&pdev->dev, "Couldn't register mmsys reset controller: %d\n",
> ret);
> f27ef2856343e2 Enric Balletbo i Serra 2021-09-30 311
> return ret;
> f27ef2856343e2 Enric Balletbo i Serra 2021-09-30 312 }
> f27ef2856343e2 Enric Balletbo i Serra 2021-09-30 313
> 8cfc54a36d3e79 jason-jh.lin 2022-04-12 314 res =
> platform_get_resource(pdev, IORESOURCE_MEM, 0);
> 8cfc54a36d3e79 jason-jh.lin 2022-04-12 @315 if
> (PTR_ERR(res)) {
>
> You probably meant IS_ERR() instead of PTR_ERR(). But actually
> platform_get_resource() does not return error pointers, it returns
> NULL so the correct check is:
>
> if (!res) {
>
Yes, I missed this fix and I will also apply the fix to
mtk_drm_drv.c:639 in [v18,07/10] of this series.
Thank you!
Regards,
Jason-JH.Lin
> 8cfc54a36d3e79 jason-jh.lin 2022-04-12 316
> dev_err(dev, "Couldn't get mmsys resource\n");
> 8cfc54a36d3e79 jason-jh.lin 2022-04-12 317
> return -EINVAL;
> 8cfc54a36d3e79 jason-jh.lin 2022-04-12 318 }
> 8cfc54a36d3e79 jason-jh.lin 2022-04-12 319 mmsys-
> >io_start = res->start;
> 8cfc54a36d3e79 jason-jh.lin 2022-04-12 320
> 8cfc54a36d3e79 jason-jh.lin 2022-04-12 321 match_d
> ata = of_device_get_match_data(dev);
> 8cfc54a36d3e79 jason-jh.lin 2022-04-12 322 if
> (match_data->num_drv_data > 1) {
> 8cfc54a36d3e79 jason-jh.lin 2022-04-12 323
> /* This SoC has multiple mmsys channels */
> 8cfc54a36d3e79 jason-jh.lin 2022-04-12 324
> ret = mtk_mmsys_find_match_drvdata(mmsys, match_data);
> 8cfc54a36d3e79 jason-jh.lin 2022-04-12 325
> if (ret < 0) {
> 8cfc54a36d3e79 jason-jh.lin 2022-04-12 326
> dev_err(dev, "Couldn't get match driver data\n");
> 8cfc54a36d3e79 jason-jh.lin 2022-04-12 327
> return ret;
> 8cfc54a36d3e79 jason-jh.lin 2022-04-12 328
> }
> 8cfc54a36d3e79 jason-jh.lin 2022-04-12 329
> mmsys->data = match_data->drv_data[ret];
> 8cfc54a36d3e79 jason-jh.lin 2022-04-12 330 } else
> {
> 8cfc54a36d3e79 jason-jh.lin 2022-04-12 331
> dev_dbg(dev, "Using single mmsys channel\n");
> 8cfc54a36d3e79 jason-jh.lin 2022-04-12 332
> mmsys->data = match_data->drv_data[0];
> 8cfc54a36d3e79 jason-jh.lin 2022-04-12 333 }
> 8cfc54a36d3e79 jason-jh.lin 2022-04-12 334
> ce15e7faa2fc54 CK Hu 2021-03-17 335 platfor
> m_set_drvdata(pdev, mmsys);
> 13032709e23285 Matthias Brugger 2020-03-25 336
> ce15e7faa2fc54 CK Hu 2021-03-17 337 clks =
> platform_device_register_data(&pdev->dev, mmsys->data->clk_driver,
> 13032709e23285 Matthias Brugger 2020-03-25 338
> PLATFORM_DEVID_AUTO, NULL, 0);
> 13032709e23285 Matthias Brugger 2020-03-25 339 if
> (IS_ERR(clks))
> 13032709e23285 Matthias Brugger 2020-03-25 340
> return PTR_ERR(clks);
> 13032709e23285 Matthias Brugger 2020-03-25 341
> 667c769246b01c Enric Balletbo i Serra 2020-03-25 342 drm =
> platform_device_register_data(&pdev->dev, "mediatek-drm",
> 667c769246b01c Enric Balletbo i Serra 2020-03-25 343
> PLATFORM_DEVID_AUTO, NULL, 0);
> ff34e17cf9bce8 Wei Yongjun 2020-05-06 344 if
> (IS_ERR(drm)) {
> ff34e17cf9bce8 Wei Yongjun 2020-05-06 345
> platform_device_unregister(clks);
> 667c769246b01c Enric Balletbo i Serra 2020-03-25 346
> return PTR_ERR(drm);
> ff34e17cf9bce8 Wei Yongjun 2020-05-06 347 }
> 667c769246b01c Enric Balletbo i Serra 2020-03-25 348
> 13032709e23285 Matthias Brugger 2020-03-25 349 return
> 0;
> 13032709e23285 Matthias Brugger 2020-03-25 350 }
>
--
Jason-JH Lin <jason-jh.lin@mediatek.com>
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