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From: rahul sharma <r-sharma3@ti.com>
To: Conor <mail@conchuod.ie>, Conor Dooley <conor@kernel.org>
Cc: <peda@lysator.liu.se>, <robh@kernel.org>, <krzk+dt@kernel.org>,
	<conor+dt@kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <vigneshr@ti.com>
Subject: Re: Re: Re: Re: [PATCH 1/2] dt-bindings: mux-controller: ti: add binding for event mux router
Date: Fri, 18 Sep 2026 23:35:28 +0530	[thread overview]
Message-ID: <1cd03e37-a9bb-4c21-b8f6-557a1fcacc5b@ti.com> (raw)
In-Reply-To: <8724E360-7B38-48E2-8A5D-9BBAA69EAD06@conchuod.ie>

Hi Conor,

On 18/09/26 03:40, Conor wrote:
> On 17 September 2026 17: 44: 21 GMT+02: 00, rahul sharma <r-sharma3@ ti. com>
> wrote: >Hi Conor, > >On 15/09/26 19: 19, Conor Dooley wrote: >> On Tue, Sep 15,
> 2026 at 06: 10: 45PM +0530, rahul sharma wrote: >>> Hi Conor,
> 
> 
> 
> On 17 September 2026 17:44:21 GMT+02:00, rahul sharma <r-sharma3@ti.com> wrote:
>>Hi Conor,
>>
>>On 15/09/26 19:19, Conor Dooley wrote:
>>> On Tue, Sep 15, 2026 at 06:10:45PM +0530, rahul sharma wrote:
>>>> Hi Conor,
>>>> 
>>>> Thanks for reviewing.
>>>> Apologies for the delay in responding.
>>>> 
>>>> On 28/08/26 21:57, Conor Dooley wrote:
>>>>> On Fri, Aug 28, 2026 at 03:36:14PM +0530, Rahul Sharma wrote:
>>>>>> Add binding for the event mux router of TI's K3 based SoC AM62L.
>>>>>> 
>>>>>> The TI K3 mux routers which route the GPIO input events or Time-Sync
>>>>>> events b/w peripherals instead of routing to a CPU.
>>>>>> 
>>>>>> Refer Section 10.2 and 10.2.1 of https://www.ti.com/lit/pdf/sprujb4 
>>>>>> 
>>>>>> Signed-off-by: Rahul Sharma <r-sharma3@ti.com>
>>>>>> ---
>>>>>>    .../mux/ti,am62l-event-mux-router.yaml        | 79 +++++++++++++++++++
>>>>>>    1 file changed, 79 insertions(+)
>>>>>>    create mode 100644 Documentation/devicetree/bindings/mux/ti,am62l-event-mux-router.yaml
>>>>>> 
>>>>>> diff --git a/Documentation/devicetree/bindings/mux/ti,am62l-event-mux-router.yaml b/Documentation/devicetree/bindings/mux/ti,am62l-event-mux-router.yaml
>>>>>> new file mode 100644
>>>>>> index 000000000000..a5ba7f78a156
>>>>>> --- /dev/null
>>>>>> +++ b/Documentation/devicetree/bindings/mux/ti,am62l-event-mux-router.yaml
>>>>>> @@ -0,0 +1,79 @@
>>>>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>>>>> +%YAML 1.2
>>>>>> +---
>>>>>> +$id: https://urldefense.com/v3/__http://devicetree.org/schemas/mux/ti,am62l-event- 
> mux-router.yaml*__;Iw!!G3vK!VJUh5A8cDCko1ZAGtTQ8V-
> LL1vTj1BNr5NNBonzfy5GnFCQkP4Oc-0Kkq4xVdCcEA5bQcDckFu6UyA$ <https://urldefense.com/v3/__http://devicetree.org/schemas/mux/ti,am62l-event-mux-router.yaml*__;Iw!!G3vK!VJUh5A8cDCko1ZAGtTQ8V-LL1vTj1BNr5NNBonzfy5GnFCQkP4Oc-0Kkq4xVdCcEA5bQcDckFu6UyA$>
>>>>>> +$schema: https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!! 
> G3vK!VJUh5A8cDCko1ZAGtTQ8V-LL1vTj1BNr5NNBonzfy5GnFCQkP4Oc-0Kkq4xVdCcEA5bQcDdyRJuLcg$ <https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!G3vK!VJUh5A8cDCko1ZAGtTQ8V-LL1vTj1BNr5NNBonzfy5GnFCQkP4Oc-0Kkq4xVdCcEA5bQcDdyRJuLcg$>
>>>>>> +
>>>>>> +title: TI Event Multiplexer on K3 SoCs
>>>>>> +
>>>>>> +maintainers:
>>>>>> +  - Rahul Sharma <r-sharma3@ti.com>
>>>>>> +
>>>>>> +description:
>>>>>> +  The TI K3 mux routers routes the GPIO input events or Time
>>>>>> +  Sync events between peripherals instead of routing to a CPU.
>>>>>> +
>>>>>> +allOf:
>>>>>> +  - $ref: mux-controller.yaml#
>>>>>> +
>>>>>> +properties:
>>>>>> +  compatible:
>>>>>> +    const: ti,am62l-event-mux-router
>>>>>> +
>>>>>> +  reg:
>>>>>> +    description: Register base address and size.
>>>>>> +    maxItems: 1
>>>>>> +
>>>>>> +  '#mux-control-cells':
>>>>>> +    const: 1
>>>>>> +    description:
>>>>>> +      Number of cells in a mux control specifier. This should be 1.
>>>>>> +      The cell specifies which mux control to use (0-based index).
>>>>>> +
>>>>>> +  ti,reg-mask-val:
>>>>>> +    $ref: /schemas/types.yaml#/definitions/uint32-matrix
>>>>>> +    items:
>>>>>> +      items:
>>>>>> +        - description: Register offset (relative to reg base)
>>>>>> +        - description: Bit mask for the mux control bits
>>>>>> +        - description: Value to write when mux is active (state 1)
>>>>>> +    minItems: 1
>>>>>> +    description: |
>>>>>> +      Array of triplets specifying register offset, mask, and value for each
>>>>>> +      mux control. Each triplet contains:
>>>>>> +      - register offset (relative to reg base)
>>>>>> +      - bit mask for the mux control bits
>>>>>> +      - value to write when mux is active (state 1)
>>>>> 
>>>>> You have a device-specific compatible, why do you need this? If the
>>>>> active setting depends on the device or w/e, why can that not come from
>>>>> a mux-control-cell?
>>>> 
>>>> This is a boot-time/board-fixed routing decision, not a runtime-selectable
>>>> mux that any driver ever calls mux_control_select() on.
>>> 
>>> 2/3 of this property appears to describe the register layout of the
>>> device, that's not affected by the board or some boot time decision.
>>> 
>>
>>You are right about the mask element; I will move the mask into the driver since it is constant across all entries. However, the reg-offset must remain in the DT, as it is specific to each BCDMA channel's trigger line configuration. This allows the DT to define the unique routing offsets required for the hardware.
> 
> The reason you cite here for needing reg offset is exactly what using mux-controls from a consumer node provides.

I will refactor this to use mux-control-cells. I will drop 
ti,reg-mask-val from the bindings and instead source the reg-offset and 
value from the consumer node.

BR,
Rahul

> 
>>
>>>> 
>>>> Please refer below link for the IP block diagram:
>>>> https://urldefense.com/v3/__https://github.com/lucifer-9852/linux/commit/ 
> aed1746e411a9f0ad7824f4e4a7121e6f56a4ef2__;!!G3vK!VJUh5A8cDCko1ZAGtTQ8V-
> LL1vTj1BNr5NNBonzfy5GnFCQkP4Oc-0Kkq4xVdCcEA5bQcDdDoeFS5w$ <https://urldefense.com/v3/__https://github.com/lucifer-9852/linux/commit/aed1746e411a9f0ad7824f4e4a7121e6f56a4ef2__;!!G3vK!VJUh5A8cDCko1ZAGtTQ8V-LL1vTj1BNr5NNBonzfy5GnFCQkP4Oc-0Kkq4xVdCcEA5bQcDdDoeFS5w$>
>>>> 
>>>> For detailed view of IP you can refer Section 10.2 and 10.2.1 of TRM
>>>> https://www.ti.com/lit/pdf/sprujb4 
>>>> 
>>>> That's precisely why we added ti,reg-mask-val as a controller-side property
>>>> rather than sourcing the value from a consumer's mux-control-cell: there is
>>>> no runtime consumer selecting between states, so the routing has to be fully
>>>> described on the provider.
>>> 
>>> Why do you have #mux-control-cells if there are no consumers? I don't
>>> understand why the GPIO controller or the device that the interrupt is
>>> being routed to cannot have a mux-controls property that contains the
>>> "value to write when the mux is active".
>>> 
>>
>>You are correct regarding #mux-control-cells. Since, this driver is used for static routing rather than runtime selection by a consumer, that property is unnecessary. I will remove it.
> 
> I still don't understand this argument, if you have a static configuration just do it the probe of the consumers driver.
> Then you get to use standard properties rather than encode the register map in the binding...
> 
>>
>>BR,
>>Rahul
>>
>>> Confused,
>>> Conor.
>>> 
>>>> 
>>>> BR,
>>>> Rahul
>>>> 
>>>>> 
>>>>>> +
>>>>>> +  idle-states:
>>>>>> +    $ref: /schemas/types.yaml#/definitions/uint32-array
>>>>> 
>>>>> This is not needed, you get the type from mux-controller.yaml.
>>>>> 
>>>>> pw-bot: changes-requested
>>>>> 
>>>>> Thanks,
>>>>> Conor.
>>>>> 
>>>>>> +    description: |
>>>>>> +      Idle state for each mux control. Each entry corresponds to a mux control:
>>>>>> +      - 0: clear masked bits when idle, also refers to inactive state
>>>>>> +      - 1: set configured value when idle, also refers to active state
>>>>>> +      - MUX_IDLE_AS_IS (-1): keep current state when idle
>>>>>> +
>>>>>> +required:
>>>>>> +  - compatible
>>>>>> +  - reg
>>>>>> +  - '#mux-control-cells'
>>>>>> +  - ti,reg-mask-val
>>>>>> +  - idle-states
>>>>>> +
>>>>>> +additionalProperties: false
>>>>>> +
>>>>>> +examples:
>>>>>> +  - |
>>>>>> +    #include <dt-bindings/mux/mux.h>
>>>>>> +
>>>>>> +    // Example 1: TI AM62L GPIO Mux Router
>>>>>> +    mux-controller@a00000 {
>>>>>> +        compatible = "ti,am62l-event-mux-router";
>>>>>> +        reg = <0xa00000 0x400>;
>>>>>> +        #mux-control-cells = <1>;
>>>>>> +
>>>>>> +        /* Mux Register addresses: 0xa00004 + (J × 4) */
>>>>>> +        /* GPIO0_40 -> BCDMA trigger 15 */
>>>>>> +        ti,reg-mask-val = <0x40 0x000ff 0x00028>;
>>>>>> +        idle-states = <0>;
>>>>>> +    };
>>>>>> -- 
>>>>>> 2.34.1
>>>>>> 
>>>> 
>>
> 


  reply	other threads:[~2026-09-18 18:06 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-28 10:06 [PATCH 0/2] Add TI's event mux router driver and build Rahul Sharma
2026-08-28 10:06 ` [PATCH 1/2] dt-bindings: mux-controller: ti: add binding for event mux router Rahul Sharma
2026-08-28 11:50   ` Alvin Šipraga
2026-09-02 12:25     ` [EXTERNAL] " rahul sharma
2026-08-28 16:27   ` Conor Dooley
2026-09-15 12:40     ` rahul sharma
2026-09-15 13:49       ` Conor Dooley
2026-09-17 15:44         ` rahul sharma
2026-09-17 22:10           ` Conor
2026-09-18 18:05             ` rahul sharma [this message]
2026-09-19  6:04               ` Peter Rosin
2026-08-28 10:06 ` [PATCH 2/2] mux-controller: ti: add driver " Rahul Sharma
2026-08-29 15:14   ` Peter Rosin
2026-09-03 19:16     ` [EXTERNAL] " Sharma, Rahul

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