[PATCH] arm64: dts: renesas: spider: Add overlay for PCIe ch0 endpoint mode

[PATCH] arm64: dts: renesas: spider: Add overlay for PCIe ch0 endpoint mode

[Koichiro Den]

PCIe channel 0 on the R-Car S4-8 Spider board can work either as a Root
Complex (the default) or as an Endpoint. Add an overlay that disables
the RC node and enables the EP node, to let it work in EP mode.

Signed-off-by: Koichiro Den <den@valinux.co.jp>
---
 arch/arm64/boot/dts/renesas/Makefile              |  3 +++
 .../dts/renesas/r8a779f0-spider-pcie0-ep.dtso     | 15 +++++++++++++++
 2 files changed, 18 insertions(+)
 create mode 100644 arch/arm64/boot/dts/renesas/r8a779f0-spider-pcie0-ep.dtso

diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index c6f3718cd19f..2b0012118287 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -86,6 +86,9 @@ dtb-$(CONFIG_ARCH_R8A77995) += r8a77995-draak-panel-aa104xd12.dtb
 dtb-$(CONFIG_ARCH_R8A779A0) += r8a779a0-falcon.dtb
 
 dtb-$(CONFIG_ARCH_R8A779F0) += r8a779f0-spider.dtb
+dtb-$(CONFIG_ARCH_R8A779F0) += r8a779f0-spider-pcie0-ep.dtbo
+r8a779f0-spider-pcie0-ep-dtbs := r8a779f0-spider.dtb r8a779f0-spider-pcie0-ep.dtbo
+dtb-$(CONFIG_ARCH_R8A779F0) += r8a779f0-spider-pcie0-ep.dtb
 dtb-$(CONFIG_ARCH_R8A779F0) += r8a779f4-s4sk.dtb
 
 dtb-$(CONFIG_ARCH_R8A779G0) += r8a779g0-white-hawk.dtb
diff --git a/arch/arm64/boot/dts/renesas/r8a779f0-spider-pcie0-ep.dtso b/arch/arm64/boot/dts/renesas/r8a779f0-spider-pcie0-ep.dtso
new file mode 100644
index 000000000000..0dc8aaf7a3be
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a779f0-spider-pcie0-ep.dtso
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2026 Renesas Electronics Corp.
+ */
+
+/dts-v1/;
+/plugin/;
+
+&pciec0 {
+	status = "disabled";
+};
+
+&pciec0_ep {
+	status = "okay";
+};

base-commit: d99e991749f3b12a3a8b23224725dbc1ca15f6bf
-- 
2.54.0

Re: [PATCH] arm64: dts: renesas: spider: Add overlay for PCIe ch0 endpoint mode

[Marek Vasut]

On 10/22/26 10:21 AM, Koichiro Den wrote:

Hello Den-san,

[...]

> +++ b/arch/arm64/boot/dts/renesas/r8a779f0-spider-pcie0-ep.dtso
> @@ -0,0 +1,15 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/*
> + * Copyright (C) 2026 Renesas Electronics Corp.

Is this header correct ?

Would it be possible to include a brief "example usage" comment in the 
header ? An example of such a comment is available in e.g. 
arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-fan-argon40.dtso 
"Example usage:" . If this would be too complicated, then please ignore 
this request.

Thank you for your help !

-- 
Best regards,
Marek Vasut

Re: [PATCH] arm64: dts: renesas: spider: Add overlay for PCIe ch0 endpoint mode

[Koichiro Den]

On Fri, Oct 23, 2026 at 02:58:38AM +0200, Marek Vasut wrote:
> On 10/22/26 10:21 AM, Koichiro Den wrote:
> 
> Hello Den-san,
> 
> [...]
> 
> > +++ b/arch/arm64/boot/dts/renesas/r8a779f0-spider-pcie0-ep.dtso
> > @@ -0,0 +1,15 @@
> > +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> > +/*
> > + * Copyright (C) 2026 Renesas Electronics Corp.
> 
> Is this header correct ?

I checked with Renesas just in case, and confirmed it is fine.

> 
> Would it be possible to include a brief "example usage" comment in the
> header ? An example of such a comment is available in e.g.
> arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-fan-argon40.dtso "Example
> usage:" . If this would be too complicated, then please ignore this request.

I would personally perfer to stay aligned with other in-tree PCIe endpoint
overlays (e.g. freescale/imx*, rockchip/*, ti/k3-*) rather than adding
fan/HAT-style examples here.

The typical (long-standing) usage would just be the standard configfs steps for
pci-epf-test (documented in Documentation/PCI/endpoint/pci-test-howto.rst), so I
suspect duplicating those generic instructions in this file might not add much
value.

That said, keeping the header completely bare might look too terse.
How about something like this:

  // SPDX-License-Identifier: (GPL-2.0 OR MIT)
  /*
   * DT Overlay for enabling PCIe channel 0 in Endpoint Configuration with the
   * R-Car S4-8 Spider board.
   *
   * Copyright (C) 2026 Renesas Electronics Corp.
   */

Thank you for the review!

Best regards,
Koichiro Den

> 
> Thank you for your help !
> 
> -- 
> Best regards,
> Marek Vasut

Re: [PATCH] arm64: dts: renesas: spider: Add overlay for PCIe ch0 endpoint mode

[Marek Vasut]

On 10/26/26 4:08 AM, Koichiro Den wrote:
> On Fri, Oct 23, 2026 at 02:58:38AM +0200, Marek Vasut wrote:
>> On 10/22/26 10:21 AM, Koichiro Den wrote:
>>
>> Hello Den-san,
>>
>> [...]
>>
>>> +++ b/arch/arm64/boot/dts/renesas/r8a779f0-spider-pcie0-ep.dtso
>>> @@ -0,0 +1,15 @@
>>> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
>>> +/*
>>> + * Copyright (C) 2026 Renesas Electronics Corp.
>>
>> Is this header correct ?
> 
> I checked with Renesas just in case, and confirmed it is fine.

Thank you for checking.

>> Would it be possible to include a brief "example usage" comment in the
>> header ? An example of such a comment is available in e.g.
>> arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-fan-argon40.dtso "Example
>> usage:" . If this would be too complicated, then please ignore this request.
> 
> I would personally perfer to stay aligned with other in-tree PCIe endpoint
> overlays (e.g. freescale/imx*, rockchip/*, ti/k3-*) rather than adding
> fan/HAT-style examples here.
> 
> The typical (long-standing) usage would just be the standard configfs steps for
> pci-epf-test (documented in Documentation/PCI/endpoint/pci-test-howto.rst)

How about adding modified form of this ^ sentence into the header ?
(please see below)

> , so I
> suspect duplicating those generic instructions in this file might not add much
> value.
> 
> That said, keeping the header completely bare might look too terse.
> How about something like this:
> 
>    // SPDX-License-Identifier: (GPL-2.0 OR MIT)
>    /*
>     * DT Overlay for enabling PCIe channel 0 in Endpoint Configuration with the
>     * R-Car S4-8 Spider board.
>     *
>     * Copyright (C) 2026 Renesas Electronics Corp.

How about adding this here:

*
* Please follow the standard configfs steps for pci-epf-test documented in
* Documentation/PCI/endpoint/pci-test-howto.rst to set the endpoint up.

This would steer users toward the documentation. What do you think ?

[...]

-- 
Best regards,
Marek Vasut

Re: [PATCH] arm64: dts: renesas: spider: Add overlay for PCIe ch0 endpoint mode

[Koichiro Den]

On Mon, Oct 26, 2026 at 06:35:09AM +0100, Marek Vasut wrote:
> On 10/26/26 4:08 AM, Koichiro Den wrote:
> > On Fri, Oct 23, 2026 at 02:58:38AM +0200, Marek Vasut wrote:
> > > On 10/22/26 10:21 AM, Koichiro Den wrote:
> > > 
> > > Hello Den-san,
> > > 
> > > [...]
> > > 
> > > > +++ b/arch/arm64/boot/dts/renesas/r8a779f0-spider-pcie0-ep.dtso
> > > > @@ -0,0 +1,15 @@
> > > > +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> > > > +/*
> > > > + * Copyright (C) 2026 Renesas Electronics Corp.
> > > 
> > > Is this header correct ?
> > 
> > I checked with Renesas just in case, and confirmed it is fine.
> 
> Thank you for checking.
> 
> > > Would it be possible to include a brief "example usage" comment in the
> > > header ? An example of such a comment is available in e.g.
> > > arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-fan-argon40.dtso "Example
> > > usage:" . If this would be too complicated, then please ignore this request.
> > 
> > I would personally perfer to stay aligned with other in-tree PCIe endpoint
> > overlays (e.g. freescale/imx*, rockchip/*, ti/k3-*) rather than adding
> > fan/HAT-style examples here.
> > 
> > The typical (long-standing) usage would just be the standard configfs steps for
> > pci-epf-test (documented in Documentation/PCI/endpoint/pci-test-howto.rst)
> 
> How about adding modified form of this ^ sentence into the header ?
> (please see below)
> 
> > , so I
> > suspect duplicating those generic instructions in this file might not add much
> > value.
> > 
> > That said, keeping the header completely bare might look too terse.
> > How about something like this:
> > 
> >    // SPDX-License-Identifier: (GPL-2.0 OR MIT)
> >    /*
> >     * DT Overlay for enabling PCIe channel 0 in Endpoint Configuration with the
> >     * R-Car S4-8 Spider board.
> >     *
> >     * Copyright (C) 2026 Renesas Electronics Corp.
> 
> How about adding this here:
> 
> *
> * Please follow the standard configfs steps for pci-epf-test documented in
> * Documentation/PCI/endpoint/pci-test-howto.rst to set the endpoint up.
> 
> This would steer users toward the documentation. What do you think ?

Fair enough. While I'd assume anyone enabling EP mode probably already knows
what they're doing, having a pointer to the doc certainly doesn't hurt any could
be a nice nudge for users. I have no objections at all.

I'll send v2 shortly, thank you!

Best regards,
Koichiro Den

> 
> [...]
> 
> -- 
> Best regards,
> Marek Vasut