Re: [patch V2 32/37] x86: Use generic TIF bits

[Mathieu Desnoyers <mathieu.desnoyers@efficios.com>]

On 2025-08-23 12:40, Thomas Gleixner wrote:
> No point in defining generic items and the upcoming RSEQ optimizations are
> only available with this _and_ the generic entry infrastructure, which is
> already used by x86. So no further action required here.
> 
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> Cc: x86@kernel.org

Reviewed-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

> ---
>   arch/x86/Kconfig                   |    1
>   arch/x86/include/asm/thread_info.h |   74 +++++++++++++++----------------------
>   2 files changed, 31 insertions(+), 44 deletions(-)
> 
> --- a/arch/x86/Kconfig
> +++ b/arch/x86/Kconfig
> @@ -239,6 +239,7 @@ config X86
>   	select HAVE_EFFICIENT_UNALIGNED_ACCESS
>   	select HAVE_EISA			if X86_32
>   	select HAVE_EXIT_THREAD
> +	select HAVE_GENERIC_TIF_BITS
>   	select HAVE_GUP_FAST
>   	select HAVE_FENTRY			if X86_64 || DYNAMIC_FTRACE
>   	select HAVE_FTRACE_GRAPH_FUNC		if HAVE_FUNCTION_GRAPH_TRACER
> --- a/arch/x86/include/asm/thread_info.h
> +++ b/arch/x86/include/asm/thread_info.h
> @@ -80,56 +80,42 @@ struct thread_info {
>   #endif
>   
>   /*
> - * thread information flags
> - * - these are process state flags that various assembly files
> - *   may need to access
> + * Tell the generic TIF infrastructure which bits x86 supports
>    */
> -#define TIF_NOTIFY_RESUME	1	/* callback before returning to user */
> -#define TIF_SIGPENDING		2	/* signal pending */
> -#define TIF_NEED_RESCHED	3	/* rescheduling necessary */
> -#define TIF_NEED_RESCHED_LAZY	4	/* Lazy rescheduling needed */
> -#define TIF_SINGLESTEP		5	/* reenable singlestep on user return*/
> -#define TIF_SSBD		6	/* Speculative store bypass disable */
> -#define TIF_SPEC_IB		9	/* Indirect branch speculation mitigation */
> -#define TIF_SPEC_L1D_FLUSH	10	/* Flush L1D on mm switches (processes) */
> -#define TIF_USER_RETURN_NOTIFY	11	/* notify kernel of userspace return */
> -#define TIF_UPROBE		12	/* breakpointed or singlestepping */
> -#define TIF_PATCH_PENDING	13	/* pending live patching update */
> -#define TIF_NEED_FPU_LOAD	14	/* load FPU on return to userspace */
> -#define TIF_NOCPUID		15	/* CPUID is not accessible in userland */
> -#define TIF_NOTSC		16	/* TSC is not accessible in userland */
> -#define TIF_NOTIFY_SIGNAL	17	/* signal notifications exist */
> -#define TIF_MEMDIE		20	/* is terminating due to OOM killer */
> -#define TIF_POLLING_NRFLAG	21	/* idle is polling for TIF_NEED_RESCHED */
> +#define HAVE_TIF_NEED_RESCHED_LAZY
> +#define HAVE_TIF_POLLING_NRFLAG
> +#define HAVE_TIF_SINGLESTEP
> +
> +#include <asm-generic/thread_info_tif.h>
> +
> +/* Architecture specific TIF space starts at 16 */
> +#define TIF_SSBD		16	/* Speculative store bypass disable */
> +#define TIF_SPEC_IB		17	/* Indirect branch speculation mitigation */
> +#define TIF_SPEC_L1D_FLUSH	18	/* Flush L1D on mm switches (processes) */
> +#define TIF_NEED_FPU_LOAD	19	/* load FPU on return to userspace */
> +#define TIF_NOCPUID		20	/* CPUID is not accessible in userland */
> +#define TIF_NOTSC		21	/* TSC is not accessible in userland */
>   #define TIF_IO_BITMAP		22	/* uses I/O bitmap */
>   #define TIF_SPEC_FORCE_UPDATE	23	/* Force speculation MSR update in context switch */
>   #define TIF_FORCED_TF		24	/* true if TF in eflags artificially */
> -#define TIF_BLOCKSTEP		25	/* set when we want DEBUGCTLMSR_BTF */
> +#define TIF_SINGLESTEP		25	/* reenable singlestep on user return*/
> +#define TIF_BLOCKSTEP		26	/* set when we want DEBUGCTLMSR_BTF */
>   #define TIF_LAZY_MMU_UPDATES	27	/* task is updating the mmu lazily */
> -#define TIF_ADDR32		29	/* 32-bit address space on 64 bits */
> +#define TIF_ADDR32		28	/* 32-bit address space on 64 bits */
>   
> -#define _TIF_NOTIFY_RESUME	(1 << TIF_NOTIFY_RESUME)
> -#define _TIF_SIGPENDING		(1 << TIF_SIGPENDING)
> -#define _TIF_NEED_RESCHED	(1 << TIF_NEED_RESCHED)
> -#define _TIF_NEED_RESCHED_LAZY	(1 << TIF_NEED_RESCHED_LAZY)
> -#define _TIF_SINGLESTEP		(1 << TIF_SINGLESTEP)
> -#define _TIF_SSBD		(1 << TIF_SSBD)
> -#define _TIF_SPEC_IB		(1 << TIF_SPEC_IB)
> -#define _TIF_SPEC_L1D_FLUSH	(1 << TIF_SPEC_L1D_FLUSH)
> -#define _TIF_USER_RETURN_NOTIFY	(1 << TIF_USER_RETURN_NOTIFY)
> -#define _TIF_UPROBE		(1 << TIF_UPROBE)
> -#define _TIF_PATCH_PENDING	(1 << TIF_PATCH_PENDING)
> -#define _TIF_NEED_FPU_LOAD	(1 << TIF_NEED_FPU_LOAD)
> -#define _TIF_NOCPUID		(1 << TIF_NOCPUID)
> -#define _TIF_NOTSC		(1 << TIF_NOTSC)
> -#define _TIF_NOTIFY_SIGNAL	(1 << TIF_NOTIFY_SIGNAL)
> -#define _TIF_POLLING_NRFLAG	(1 << TIF_POLLING_NRFLAG)
> -#define _TIF_IO_BITMAP		(1 << TIF_IO_BITMAP)
> -#define _TIF_SPEC_FORCE_UPDATE	(1 << TIF_SPEC_FORCE_UPDATE)
> -#define _TIF_FORCED_TF		(1 << TIF_FORCED_TF)
> -#define _TIF_BLOCKSTEP		(1 << TIF_BLOCKSTEP)
> -#define _TIF_LAZY_MMU_UPDATES	(1 << TIF_LAZY_MMU_UPDATES)
> -#define _TIF_ADDR32		(1 << TIF_ADDR32)
> +#define _TIF_SSBD		BIT(TIF_SSBD)
> +#define _TIF_SPEC_IB		BIT(TIF_SPEC_IB)
> +#define _TIF_SPEC_L1D_FLUSH	BIT(TIF_SPEC_L1D_FLUSH)
> +#define _TIF_NEED_FPU_LOAD	BIT(TIF_NEED_FPU_LOAD)
> +#define _TIF_NOCPUID		BIT(TIF_NOCPUID)
> +#define _TIF_NOTSC		BIT(TIF_NOTSC)
> +#define _TIF_IO_BITMAP		BIT(TIF_IO_BITMAP)
> +#define _TIF_SPEC_FORCE_UPDATE	BIT(TIF_SPEC_FORCE_UPDATE)
> +#define _TIF_FORCED_TF		BIT(TIF_FORCED_TF)
> +#define _TIF_BLOCKSTEP		BIT(TIF_BLOCKSTEP)
> +#define _TIF_SINGLESTEP		BIT(TIF_SINGLESTEP)
> +#define _TIF_LAZY_MMU_UPDATES	BIT(TIF_LAZY_MMU_UPDATES)
> +#define _TIF_ADDR32		BIT(TIF_ADDR32)
>   
>   /* flags to check in __switch_to() */
>   #define _TIF_WORK_CTXSW_BASE					\
> 


-- 
Mathieu Desnoyers
EfficiOS Inc.
https://www.efficios.com