Re: pdev_enable_device no longer used ?

[Russell King <rmk@arm.linux.org.uk>]

=?ISO-8859-1?Q?G=E9rard_Roudier?= writes:
> As a result, in my opinion:
> 
> - A device that requires some non zero cache line size value lower than
> the right value for a given system and that actually use MWIs must not be
> supported on that system, unless we know that the bridge does alias MWI to
> MW. (If such a device can be configured for not using MWI, any value for 
> the PCI cache line size will not break).
> 
> - A driver that blindly shoe-horns some value for the cache-line size must
> be fixed. Basically, it should not change the value if it is not zero and,
> at least, warn user if it has changed the value because it was zero.
> 
> What are the strong reasons that let some POST softwares not fill properly
> the cache line size of PCI devices ?

Erm, stupid observation coming up.  Isn't this what the architecture-
specific 'pcibios_set_master' function is for?  To do any architecture
specific fiddling with the device.

Surely, writing to the cache line size is not something that a driver
should be doing, but something that the architecture specific code
should be doing.  Likewise, fiddling with latency timers without good
reason (eg, broken latency timers) surely is asking for problems.
   _____
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  |   |         Russell King        rmk@arm.linux.org.uk      --- ---
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