New: SSE2 enabled by default on Celeron (P4 based)

New: SSE2 enabled by default on Celeron (P4 based)

[Martin J. Bligh]

http://bugme.osdl.org/show_bug.cgi?id=527

           Summary: SSE2 enabled by default on Celeron (P4 based)
    Kernel Version: 2.5.64
            Status: NEW
          Severity: normal
             Owner: mbligh@aracnet.com
         Submitter: simon@mtds.com


Distribution: Customised RH 7.1 with many mods
Hardware Environment: Celeron i686 (P4 based)
Software Environment: gcc version 2.96 20000731 (Red Hat Linux 7.1 2.96-81)

Problem Description: Kernel compiles OK, but at boot kernel panics as CPU
doesn't support SSE2

Steps to reproduce: Compile kernel choosing *any* Celeron option

/proc/cpuinfo:-
processor       : 0
vendor_id       : GenuineIntel
cpu family      : 6
model           : 11
model name      : Intel(R) Celeron(TM) CPU                1300MHz
stepping        : 1
cpu MHz         : 1302.763
cache size      : 256 KB
fdiv_bug        : no
hlt_bug         : no
f00f_bug        : no
coma_bug        : no
fpu             : yes
fpu_exception   : yes
cpuid level     : 2
wp              : yes
flags           : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
pat pse36 mmx fxsr sse
bogomips        : 2580.48

I tried manually editing the SSE2 flags before compiling, didn't work either. If
I am correct, SSE2 is not a feature of Celerons.

New: SSE2 enabled by default on Celeron (P4 based)

[Mikael Pettersson]

Martin J. Bligh writes:
 > http://bugme.osdl.org/show_bug.cgi?id=527
 > 
 >            Summary: SSE2 enabled by default on Celeron (P4 based)
 >     Kernel Version: 2.5.64
 >             Status: NEW
 >           Severity: normal
 >              Owner: mbligh@aracnet.com
 >          Submitter: simon@mtds.com
 > 
 > 
 > Distribution: Customised RH 7.1 with many mods
 > Hardware Environment: Celeron i686 (P4 based)
 > Software Environment: gcc version 2.96 20000731 (Red Hat Linux 7.1 2.96-81)
 > 
 > Problem Description: Kernel compiles OK, but at boot kernel panics as CPU
 > doesn't support SSE2
 > 
 > Steps to reproduce: Compile kernel choosing *any* Celeron option
 > 
 > /proc/cpuinfo:-
 > processor       : 0
 > vendor_id       : GenuineIntel
 > cpu family      : 6
 > model           : 11

This is NOT a P4-based Celeron. It's a P6 Tualatin Celeron, and as such,
it does not support SSE2.

This CPU needs a kernel configured for a Pentium III or less.

Re: New: SSE2 enabled by default on Celeron (P4 based)

[Simon White]

01-Apr-03 at 16:53, Mikael Pettersson (mikpe@user.it.uu.se) wrote :
> Martin J. Bligh writes:
>  > http://bugme.osdl.org/show_bug.cgi?id=527
>  > 
>  >            Summary: SSE2 enabled by default on Celeron (P4 based)
>  >     Kernel Version: 2.5.64
>  >             Status: NEW
>  >           Severity: normal
>  >              Owner: mbligh@aracnet.com
>  >          Submitter: simon@mtds.com
>  > 
>  > 
>  > Distribution: Customised RH 7.1 with many mods
>  > Hardware Environment: Celeron i686 (P4 based)
>  > Software Environment: gcc version 2.96 20000731 (Red Hat Linux 7.1 2.96-81)
>  > 
>  > Problem Description: Kernel compiles OK, but at boot kernel panics as CPU
>  > doesn't support SSE2
>  > 
>  > Steps to reproduce: Compile kernel choosing *any* Celeron option
>  > 
>  > /proc/cpuinfo:-
>  > processor       : 0
>  > vendor_id       : GenuineIntel
>  > cpu family      : 6
>  > model           : 11
> 
> This is NOT a P4-based Celeron. It's a P6 Tualatin Celeron, and as such,
> it does not support SSE2.
> 
> This CPU needs a kernel configured for a Pentium III or less.

Sorry. My reseller has told me a load of bull. In any case, I tried
compiling with all of the Celeron options, and I recall that _all_ set
SSE2, I think I must have screwed up on too much coffee, since checking
now, the .config file only has SSE2 flags for Celeron-P4, while I seem
to recall having compiled first for PIII-Celeron and still having the
kernel panic for SSE2, maybe somewhere the config files got screwed.

I feel so dumb.

-- 
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Re: New: SSE2 enabled by default on Celeron (P4 based)

[Dave Jones]

On Tue, Apr 01, 2003 at 04:53:57PM +0200, Mikael Pettersson wrote:

 >  > Steps to reproduce: Compile kernel choosing *any* Celeron option
 >  > 
 >  > /proc/cpuinfo:-
 >  > processor       : 0
 >  > vendor_id       : GenuineIntel
 >  > cpu family      : 6
 >  > model           : 11
 > 
 > This is NOT a P4-based Celeron. It's a P6 Tualatin Celeron, and as such,
 > it does not support SSE2.
 > 
 > This CPU needs a kernel configured for a Pentium III or less.

The *any* part of the bug report doesn't make much sense.
That indicates that we're doing the wrong thing on the Pentium
III/Celeron option too.

		Dave

Re: New: SSE2 enabled by default on Celeron (P4 based)

[Simon White]

01-Apr-03 at 16:16, Dave Jones (davej@codemonkey.org.uk) wrote :
> On Tue, Apr 01, 2003 at 04:53:57PM +0200, Mikael Pettersson wrote:
> 
>  >  > Steps to reproduce: Compile kernel choosing *any* Celeron option
>  >  > 
>  >  > /proc/cpuinfo:-
>  >  > processor       : 0
>  >  > vendor_id       : GenuineIntel
>  >  > cpu family      : 6
>  >  > model           : 11
>  > 
>  > This is NOT a P4-based Celeron. It's a P6 Tualatin Celeron, and as such,
>  > it does not support SSE2.
>  > 
>  > This CPU needs a kernel configured for a Pentium III or less.
> 
> The *any* part of the bug report doesn't make much sense.
> That indicates that we're doing the wrong thing on the Pentium
> III/Celeron option too.

Sorry about that. I got confused - too late a night. I thought that all
the Celeron options set the SSE2 flag but looking at it again, they
don't. I have a memory of a compile for PIII/Celeron which kernel
panicked with "processor doesn't support SSE2" but I cannot reproduce
this. 

My apologies once again,

-- 
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The only reason I'm burning my candle at both ends, is because I haven't
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Re: New: SSE2 enabled by default on Celeron (P4 based)

[mikpe]

Dave Jones writes:
 > On Tue, Apr 01, 2003 at 04:53:57PM +0200, Mikael Pettersson wrote:
 > 
 >  >  > Steps to reproduce: Compile kernel choosing *any* Celeron option
 >  >  > 
 >  >  > /proc/cpuinfo:-
 >  >  > processor       : 0
 >  >  > vendor_id       : GenuineIntel
 >  >  > cpu family      : 6
 >  >  > model           : 11
 >  > 
 >  > This is NOT a P4-based Celeron. It's a P6 Tualatin Celeron, and as such,
 >  > it does not support SSE2.
 >  > 
 >  > This CPU needs a kernel configured for a Pentium III or less.
 > 
 > The *any* part of the bug report doesn't make much sense.
 > That indicates that we're doing the wrong thing on the Pentium
 > III/Celeron option too.

I checked with 2.5.66. I couldn't find any bug. Plain "Celeron" can't
be chosen -- you have to specify processor generation, and SSE2 is
only set if PENTIUM4 is set. Downgrading from a P4 config to PIII
correctly removes SSE2.

/Mikael