* ix86 Atomic ops during DMA...
@ 2004-08-09 12:22 Richard B. Johnson
2004-08-09 12:31 ` Bart Hartgers
2004-08-09 12:38 ` Brian Gerst
0 siblings, 2 replies; 3+ messages in thread
From: Richard B. Johnson @ 2004-08-09 12:22 UTC (permalink / raw)
To: Linux kernel
Hello,
A piece of hardware needs its interrupt status written back
to its status register to "clear" interrupts and thus enable
more.. This is in an uninterruptible ISR. This, of course
can be readily accomplished by using the standard readl() and
writel() macros.........but! If a DMA is in progress, a hardware
debugger shows many milliseconds between the read and the write.
This allows a race condition to exist. So, how do I lock the bus
during the read and write? A lock on ix86 locks only the
next instruction, not the next plus time for another lock
which appears to be needed.
I need...
movl (%ebx), %eax # Read status from register in ebx
movl %eax, (%ebx) # Write it back
..to occur together without the bus being taken away by a DMA
operation until these two instructions are complete.
Cheers,
Dick Johnson
Penguin : Linux version 2.4.26 on an i686 machine (5570.56 BogoMips).
Note 96.31% of all statistics are fiction.
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: ix86 Atomic ops during DMA...
2004-08-09 12:22 ix86 Atomic ops during DMA Richard B. Johnson
@ 2004-08-09 12:31 ` Bart Hartgers
2004-08-09 12:38 ` Brian Gerst
1 sibling, 0 replies; 3+ messages in thread
From: Bart Hartgers @ 2004-08-09 12:31 UTC (permalink / raw)
To: root; +Cc: linux-kernel
On 9 Aug, Richard B. Johnson wrote:
How about:
lock andl (%ebx),0xffffffff
Not sure 100% if I have the arguments in the right order ;-).
> I need...
>
> movl (%ebx), %eax # Read status from register in ebx
> movl %eax, (%ebx) # Write it back
>
> ..to occur together without the bus being taken away by a DMA
> operation until these two instructions are complete.
--
Bart Hartgers - TUE Eindhoven
http://plasimo.phys.tue.nl/bart/contact/
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: ix86 Atomic ops during DMA...
2004-08-09 12:22 ix86 Atomic ops during DMA Richard B. Johnson
2004-08-09 12:31 ` Bart Hartgers
@ 2004-08-09 12:38 ` Brian Gerst
1 sibling, 0 replies; 3+ messages in thread
From: Brian Gerst @ 2004-08-09 12:38 UTC (permalink / raw)
To: root; +Cc: Linux kernel
Richard B. Johnson wrote:
> Hello,
>
> A piece of hardware needs its interrupt status written back
> to its status register to "clear" interrupts and thus enable
> more.. This is in an uninterruptible ISR. This, of course
> can be readily accomplished by using the standard readl() and
> writel() macros.........but! If a DMA is in progress, a hardware
> debugger shows many milliseconds between the read and the write.
>
> This allows a race condition to exist. So, how do I lock the bus
> during the read and write? A lock on ix86 locks only the
> next instruction, not the next plus time for another lock
> which appears to be needed.
>
> I need...
>
> movl (%ebx), %eax # Read status from register in ebx
> movl %eax, (%ebx) # Write it back
>
> ..to occur together without the bus being taken away by a DMA
> operation until these two instructions are complete.
You need a single read-modify-write instruction like:
lock orl $0, addr
--
Brian Gerst
^ permalink raw reply [flat|nested] 3+ messages in thread
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2004-08-09 12:22 ix86 Atomic ops during DMA Richard B. Johnson
2004-08-09 12:31 ` Bart Hartgers
2004-08-09 12:38 ` Brian Gerst
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