From: Greg KH <gregkh@suse.de>
To: Ashok Raj <ashok.raj@intel.com>
Cc: linux-kernel@vger.kernel.org, akpm@osdl.org, mingo@elte.hu,
tony.luck@intel.com, zwane@arm.linux.org.uk, hch@infradead.org
Subject: Re: Deferred handling of writes to /proc/irq/xx/smp_affinity
Date: Wed, 27 Apr 2005 22:56:55 -0700 [thread overview]
Message-ID: <20050428055655.GB11236@suse.de> (raw)
In-Reply-To: <20050427221538.A30702@unix-os.sc.intel.com>
On Wed, Apr 27, 2005 at 10:15:38PM -0700, Ashok Raj wrote:
> Hi Andrew and all
>
> It is safe to re-program rte entries in ioapic only when an intr is pending.
> Existing code does this incorrectly by reprogamming rte entries immediatly
> when a value is written to /proc/irq/xx/smp_affinity. IRQ_BALANCE code in
> kernel does this right, but /proc/irq needs to be handled the same way so that
> user mode irq_balancer wont lock up systems or loose interrupts in the race.
>
> This is already fixed in ia64, introduced for i386 and x86_64.
>
> since this touches 3 arch's managing in -mm for trial would be best to make
> sure nothing is broken, before considering for main line.
The pci/msi stuff looks fine with me, as long as you've tested it out (I
have no msi hardware...)
thanks,
greg k-h
next prev parent reply other threads:[~2005-04-28 5:59 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-04-28 5:15 Ashok Raj
2005-04-28 5:56 ` Greg KH [this message]
2005-04-28 6:48 ` Zwane Mwaikambo
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