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From: Karsten Wiese <annabellesgarden@yahoo.de>
To: linux-kernel@vger.kernel.org, discuss@x86-64.org
Cc: Ingo Molnar <mingo@elte.hu>, ak@suse.de
Subject: [RFC] AMD64 @ K8T800/VT8237: Doubled IOAPIC-level-interrupt rate
Date: Thu, 4 Aug 2005 16:25:41 +0200	[thread overview]
Message-ID: <200508041625.41296.annabellesgarden@yahoo.de> (raw)

Hi,

this should likely be addressed to VIA Taiwan,
but I don't know their engineer's e-mail address and their forum
doesn't work for me.
Maybe somebody here has a clue?
Or maybe this is even motherboard specific?

To reproduce:
	$ aplay -Dhw:0 -fdat /dev/zero

On a sane system (or here in PIC Mode) you'll see
around 12 Interrupts/s.
Here I see 24.

12 per s more is no big deal, but if you run low-latency audio,
the overhead becomes significant.

What exactly happens when i.e. the sounddevice (part of the VT8237)
triggers an interrupt (low level on interrupt pin) is this:

1. IOAPIC accepts interrupt, sends it to CPU's APIC.

2. Interrupt Routine runs,
   tells the sounddevice to deassert the interrupt pin.

3. When sounddevice deasserts pin (low to high transition),
   IOAPIC accepts an interrupt _again_ , tells APIC,
   which also accepts interrupt again (IRR-Bit set).
   _This should not happen_.
   Looks like the IOAPIC (Part of the VT8237) behaves like
   Level Triggered _AND_ Edge Triggered at once!?!

3. Interrupt Routine finishes with sending EOI to the CPU's APIC,
   which tells IOAPIC to accept Interrupts on the soundcards interrupt
   pin _now_.
   But the IOAPIC has already wrongly accepted the next interupt
   in step 2.

4. Processor accepts interrupts again and runs the soundcards
   interruptroutine again.
   Now the interrupt Routine sees a soundcard that doesn't need
   servicing and finishes, having done nothing,
   but clearing up the APIC/IOAPIC.
 
This bad behavior can be eliminated by masking the IOAPIC's interrupt pin
during the phase where the sounddevice's interrupt pin is deasserted.
But (Un)masking is also a cycle-costly operation,
which shouldn't be necessary on a sane system.

So my question here is:
Can the VT8237's IOAPIC (or other device) be programmed in a way
to behave sanely?
Or is this a known bug that can only be circumvented?
If it was an Intel/AMD chipsets I'd likely find those info's
in publicly available docs, but here the problem for me is
to get the docs...
(Or WTF do I buy stuff, which comes without public docs $%§!!grmbl!)

Thanks,
Karsten

	

	
		
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             reply	other threads:[~2005-08-04 14:29 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2005-08-04 14:25 Karsten Wiese [this message]
2005-08-04 15:19 ` Ingo Molnar
2005-08-04 16:45   ` Karsten Wiese

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