Re: question on memory barrier

[moreau francis <francis_moreau2000@yahoo.fr>]

--- Andy Isaacson <adi@hexapodia.org> a écrit :

> 
> The first register write will be completed before the second register
> write because you use writel, which is defined to have the semantics you
> want.  (It uses a platform-specific method to guarantee this, possibly
> "volatile" or "asm("eieio")" or whatever method your platform requires.)

I'm compiling Linux kernel for a MIPS32 cpu. On my platform, writel seems
expand to:

    static inline writel(u32 val, volatile void __iomem *mem)
    {
            volatile u32 *__mem;
            u32 __val;

            __mem = (void *)((unsigned long)(mem));
            __val = val;

            *__mem = __val;
    }

I don't see the magic in it since "volatile" keyword do not handle memory
ordering constraints...Linus wrote on volatile keyword, see
http://www.ussg.iu.edu/hypermail/linux/kernel/0401.0/1387.html

> 
> The sequence points, by themselves, do not make any requirements on the
> externally visible behavior of the program.  Nor does the fact that
> there's an inline function involved.  It's just the writel() that
> contains the magic to force in-order execution.
> 
> You might benefit by running your source code through gcc -E and seeing
> what the writel() expands to.  (I do something like "rm drivers/mydev.o;
> make V=1" and then copy-n-paste the gcc line, replacing the "-c -o mydev.o"
> options with -E.)

make drivers/mydev.i should do the job but preprocessor doesn't expand inline
functions. So I won't be able to see the expanded writel function.

> 
> The sequence point argument is obviously wrong, BTW - if it were the
> case that a mere sequence point required the compiler to have completed
> all externally-visible side effects, then almost every optimization that
> gcc does with -O2 would be impossible.  CSE, loop splitting, etc.
> 
> -andy
> 



	

	
		
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