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From: Andi Kleen <ak@suse.de>
To: Ravikiran G Thirumalai <kiran@scalex86.org>
Cc: Andi Kleen <ak@suse.de>, Rohit Seth <rohit.seth@intel.com>,
	Andrew Morton <akpm@osdl.org>,
	linux-kernel@vger.kernel.org, discuss@x86-64.org,
	zach@vmware.com, shai@scalex86.org, nippung@calsoftinc.com
Subject: Re: [discuss] [patch] x86_64:  align and pad x86_64 GDT on page boundary
Date: Fri, 9 Dec 2005 23:57:00 +0100	[thread overview]
Message-ID: <20051209225700.GN11190@wotan.suse.de> (raw)
In-Reply-To: <20051209221922.GA3676@localhost.localdomain>

> Just that any writes on the bp GDT will invalidate the idt_table cacheline,
> which is read mostly (as Nippun pointed out).  So could we keep the padding
> as it is for the BP too? 

Yes, good point.

> Attached is the patch which fixes the retval in do_boot_cpu to return -1.
> __cpu_up handles -1.
> 
> Hope this patch is OK.

Looks good.

Thanks,
-Andi

  reply	other threads:[~2005-12-09 22:57 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2005-12-08 19:42 Ravikiran G Thirumalai
2005-12-08 20:15 ` [discuss] " Andi Kleen
2005-12-08 21:55   ` Ravikiran G Thirumalai
2005-12-08 23:09     ` Rohit Seth
2005-12-08 23:11       ` Andi Kleen
2005-12-08 23:26         ` Rohit Seth
2005-12-08 23:26           ` Andi Kleen
2005-12-08 23:45             ` Rohit Seth
2005-12-08 23:43               ` Andi Kleen
2005-12-09 22:19                 ` Ravikiran G Thirumalai
2005-12-09 22:57                   ` Andi Kleen [this message]
2005-12-09 23:01                   ` Rohit Seth
2005-12-09 22:59                     ` Andi Kleen
2005-12-09 23:46                       ` Ravikiran G Thirumalai
2005-12-12  2:34                   ` Zwane Mwaikambo
2005-12-12  2:31                     ` Andi Kleen
2005-12-12  2:38                     ` Zwane Mwaikambo
2005-12-08 23:50               ` Rohit Seth

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